MARY W HALL portrait
  • Professor, School Of Computing
  • Professor, School Of Computing
801-581-8224

Publications

  • M. Hall and P. Basu, "Polyhedral Compiler Technology in Collaboration with Autotuning Important to Domain-Specific Frameworks for HPC," Lecture Notes in Computer Science, 2017, Volume 10136, Languages and Compilers for Parallel Computing, Springer Verlag. Published, 02/2017.
  • "Optimizing LOBPCG: Sparse Matrix Loop and Data Transformations in Action," K. Ahmad, A. Venkat and M. Hall, Lecture Notes in Computer Science, 2017, Volume 10136, Languages and Compilers for Parallel Computing, Springer Verlag, Pages 221-231. Published, 02/2017.
  • Designing a Tunable Nested Data-Parallel Programming System, S. Muralidharan, M. Garland, A. Sidelnik, M. Hall, ACM Transactions on Architecture and Code Optimization, 13(4), December 2016. Published, 12/2016.
  • Compiler Transformation to Generate Hybrid Sparse Computations, H. Zhang, A. Venkat and M. Hall, Proceedings of the Sixth Workshop on Irregular Applications: Architectures and Algorithms (IA3 2016), held in conjunction with SC16, November 2016. Published, 11/2016.
  • "A Novel Variable-Blocking Representation for Efficient Sparse Matrix-Vector Multiply on GPUs," T. Zhao, T. Rusira, K. Ahmad, and M. Hall, Poster, SC16, November, 2016. Published, 11/2016.
  • "Automating Wavefront Parallelization for Sparse Matrix Codes," A. Venkat, M. Mohamadi, J. Park, R. Barik, H. Rong, M. Strout, M. Hall, International Conference on Supercomputing, Networking, Storage and Analysis (SC), Nov. 2016, Best Paper Finalist. Published, 11/2016.
  • "Synchronization Tradeoffs in GPU Implementations of Graph Algorithms,'' R. Kaleem, A. Venkat, S. Pai, M. Hall, K. Pingali, Proceedings of the IEEE International Parallel and Distributed Processing Symposum, May, 2016. Published, 05/2016.
  • "Architecture-Adaptive Code Variant Tuning," S. Muralidharan, A. Roy, M. Hall, M. Garland, and P. Rai, Proceedings of the ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), April 2016. Published, 04/2016.
  • "Combining Polyhedral and AST Transformations in CHiLL,'' H. Zhang, A. Venkat, P. Basu, and M. Hall, in Proceedings of the International Workshop on Polyhedral Compilation Techniques at HiPEAC, Jan. 2016. Published, 01/19/2016.
  • "Generating Efficient Tensor Contractions for GPUs," T. Nelson, A. Rivera, P. Balaprakash, M. Hall, P.D. Hovland, E. Jessup, B. Norris, Proceedings of the IEEE International Conference on Parallel Processing, Sept. 2015. Published, 09/01/2015.
  • "Loop and Data Transformations for Sparse Matrix Code," A. Venkat, M. Hall, M. Strout, Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, June 2015. Published, 06/10/2015.
  • "Compiler-Directed Transformations for Higher-Order Stencils," P. Basu, M. Hall, S. Williams, B. van Straalen, L. Oliker, P. Collela, Proceedings of the International Parallel and Distributed Processing Symposum, May, 2015. Published, 05/2015.
  • "A Collection-Oriented Programming Model for Performance Portability," S. Muralidharan, M. Garland, B. Catanzaro, A. Sidelnik, M. Hall, (poster paper) In Proceedings of the 21st ACM symposium on Principles and practice of parallel programming (PPoPP '15), Feb. 2015. Published, 02/2015.
  • "Roofline Model Toolkit: A Practical Tool for Architectural and Program Analysis,'' Y. J. Lo, S. Williams, B. van Straalen, T.J. Ligocki, M.J. Cordery, N.J. Wright, M.W. Hall, L. Oliker, Workshop on Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems at SC2014, Nov. 2014. Published, 11/2014.
  • "Converting Stencils to Accumulations for Communication-Avoiding Optimization in Geometric Multigrid", P. Basu, S. Williams, B. van Straalen, L. Oliker, M. Hall, Workshop on Optimizing Stencil Computations (WOSC) at SPLASH 2014, Oct. 2014. Published, 10/2014.
  • "Nitro: A Framework for Adaptive Code Variant Tuning," S. Muralidharan , M. Shantharam, M. Hall, M. Garland, B. Catanzaro, Proceedings of the International Parallel and Distributed Processing Symposium, May, 2014. Published, 05/2014.
  • "Non-affine Extensions to Polyhedral Code Generation," A. Venkat, M. Shantharam, M. Hall, M. M. Strout, Proceedings of the International Conference on Code Generation and Optimization, Feb. 2014. Published, 02/2014.
  • "Compiler Generation and Autotuning of Communication-Avoiding Operators for Geometric Multigrid,'' P. Basu, S. Williams, B. Van Straalen, A. Venkat, L. Oliker, M. Hall, Workshop on Optimizing Stencil Computations, January 2014. Published, 01/2014.
  • "Compiler Generation and Autotuning of Communication-Avoiding Operators for Geometric Multigrid," P. Basu, S. Williams, B. Van Straalen, A. Venkat, L. Oliker, M. Hall, IEEE International Conference on High Performance Computing (HiPC), December 2013. Published, 12/2013.
  • "Towards Making Autotuning Mainstream," P. Basu, M. Hall, M. Khan, S. Maindola, S. Muralidharan, S. Ramalingam, A. Rivera, M. Shantharam, A. Venkat, International Journal of High Performance Computing Applications, 27(4), November 2013. Published, 11/2013.
  • "Rethinking Abstractions for Big Data: Why, Where, How, and What,"Mary Hall, Robert M. Kirby, Feifei Li, Miriah Meyer, Valerio Pascucci, Jeff M. Phillips, Rob Ricci, Jacobus Van der Merwe, Suresh Venkatasubramanian, ArXIV eprint arXiv:1306.3295, June 2013. Published, 06/2013.
  • Malik Khan, Protonu Basu, Gabe Rudy, Mary Hall, Chun Chen, and Jacqueline Chame. 2013. A script-based autotuning compiler system to generate high-performance CUDA code. ACM Trans. Archit. Code Optim. 9, 4, Article 31 (January 2013). Published, 01/01/2013.
  • "Hierarchical parallelization and optimization of high-order stencil computations on multicore clusters," H. Dursun, M. Kunaseth, K. Nomura, J. Chame, R.F. Lucas, C. Chen, M. Hall, R.K. Kalia, A. Nakano, P. Vashishta, The Journal of Supercomputing, 62(2):946-966, December 2012. Published, 12/2012.
  • "Understanding ACM's Past," M. Hall, Communications of the ACM}, 55(12), December 2012. Published, 12/2012.
  • Improving High-Performance Sparse Libraries using Compiler-Assisted Specialization : A PETSc Case Study,'' Shreyas Ramalingam, M. Hall and C. Chen, Workshop on High-Level Parallel Programming Models and Supportive Environments (HIPS), held in conjunction with International Parallel and Distributed Processing Symposium, May 2012. Published, 05/2012.
  • "Analyzing the eff ect of compiler optimizations on application reliability," M. Demertzi, M. Annavaram and M. Hall, Proceedings of the IEEE International Symposium on Workload Characterization, Nov., 2011. Published, 11/2011.
  • "Understanding the Behavior of Pthread Applications on Non-Uniform Cache Architectures," G. S. Sachdev, K. Sudan, M. W. Hall, and R. Balasubramonian, (poster paper), In Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, Oct. 2011. Published, 10/2011.
  • "Generating High Performance Libraries using CHiLL and Autotuning," S. Ramalingam and M. Hall, (poster), InternationalWorkshop on Languages and Compilers for Parallel Computing, Sept. 2011. Received Best Poster award. Published, 09/2011.
  • "Auto-tuning Full Applications: A Case Study", A. Tiwari, C. Chen, C. Liao, J. Chame, J. Hollingsworth, M. Hall and D. Quinlan, International Journal of High Performance Computing Applications, 25(3):286-294, Aug. 2011. Published, 08/2011.
  • "Domain-Speci c Optimization of Signal Recognition Targeting FPGAs," M. Demertzi, P.C. Diniz, M.W. Hall, A.C. Gilbert and Y.Wang, ACM Transactions on Recon gurable Technology and Systems, 4(2), May, 2011. Published, 05/2011.
  • "Evaluating graph coloring on GPUs," P. Grosset, P. Zhu, S. Liu, S. Venkatasubramanian, and M. Hall. In Proceedings of the 16th ACM symposium on Principles and practice of parallel programming (PPoPP '11), Feb. 2011. Received runner-up for Best Student Poster. Published, 02/2011.
  • "EigenCFA: Accelerating Flow Analysis with GPUs," T. Prabhu, S. Ramalingam , M. Might, M. Hall, In ACM SIGPLAN Principles of Programming Languages, Jan. 2011. Published, 01/2011.
  • “A Programming Language Interface to Describe Transformations and Code Generation,” G. Rudy, M. Khan, M. Hall, C. Chen, and J. Chame, Lecture Notes in Computer Science, 2011, Volume 6548, Languages and Compilers for Parallel Computing, Springer Verlag, Pages 136- 150. Published, 01/2011.
  • ``Languages and Compilers for Autotuning,'' M.W. Hall and J. Chame, In Performance Tuning of Scientific Applications, edited by David Bailey and Robert F. Lucas. Taylor and Francis publishers, Nov. 2010. Published, 11/2010.
    http://www.taylorandfrancis.com/books/details/9781...
  • B. Peterson, M. Datar, M. Hall and R. Whitaker, "GPU Accelerated Particle System for Triangulated Surface Meshes," (poster paper) Symposium on Application Accelerators for High Performance Computing. Published, 07/2010.
  • Gagandeep S. Sachdev, Vishay Vanjani and Mary W. Hall, "Takagi Factorization on GPU using CUDA," (poster paper), Symposium on Application Accelerators for High Performance Computing. Published, 07/2010.
  • "Autotuning and Specialization: Speeding up Nek5000 with Compiler Technology,'' Jaewook Shin, Mary W. Hall, Jacqueline Chame, Chun Chen, Paul Fischer, Paul D. Hovland, International Conference on Supercomputing, June, 2010. Published, 06/2010.
  • "Parameterized specification, configuration and execution of data-intensive scientific workflows,'' V.S. Kumar, T. Kurc, V. Ratnakar, J. Kim, G. Mehta, K. Vahi, Y.L. Nelson, P. Sadayappan, E. Deelman, Y. Gil, M. Hall and J. Saltz, Cluster Computing, April 2010. Published, 04/2010.
  • "Autotuning and Specialization: Speeding up Matrix Multiply for Small Matrices with Compiler Technology,''Jaewook Shin, Mary W. Hall, Jacqueline Chame, Chun Chen, Paul D. Hovland, In Software Automatic Tuning: from concepts to state-of-the-art results, edited by Keita Teranishi, John Cavazos, Ken Naono and Reiji Suda, Springer-Verlag Publishers, 2010. Published, 01/2010.
    http://www.springer.com/engineering/circuits+%26+s...
  • "Loop Transformation Recipes for Code Generation and Auto-Tuning," Mary Hall, Jacqueline Chame, Chun Chen, Jaewook Shin and Gabe Rudy, Lecture Notes in Computer Science, 2010, Volume 5898, Languages and Compilers for Parallel Computing, Pages 50-64. Published, 01/2010.
    http://www.springerlink.com/content/e484w874271343...
  • Compiler Research: The Next Fifty Years, M. Hall, D. Padua and K. Pingali, Communications of the ACM, Feb. 2009. Published, 2009.
    http://mags.acm.org/communications/200902/
  • "Model-Guided Autotuning of High-Productivity Languages for Petascale Computing,'' H. Zima M. Hall, C. Chen, J. Chame, invited paper for Zima keynote, Proceedings of the International Symposium on High Performance Distributed Computing, June, 2009. Published, 2009.
  • "An Integrated Framework for Parameter-based Optimization of Scientific Workflows,'' V. S. Kumar, P. Sadayappan, G. Mehta, K. Vahi, E. Deelman, V. Ratnakar, J. Kim, Y. Gil, M. Hall, T. Kurc, J. Saltz, Proceedings of the International Symposium on High Performance Distributed Computing, June, 2009. Published, 2009.
  • "Self-Configuring Applications for Heterogeneous Systems: Program Composition and Optimization Using Cognitive Techniques,'' M. Hall, Y. Gil and R. Lucas. Proceedings of the IEEE, Special Issue on Cutting-Edge Computing, Vol. 96(5), May 2008. Published, 05/01/2008.
    http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arn...
  • "Model-Guided Performance Tuning of Parameter Values: A Case Study with Molecular Dynamics Visualization,'' Y. Nelson, B. Bansal, M. Hall, A. Nakano, and K. Lerman, Proceedings of the Workshop on High-Level Parallel Programming Models and Supportive Environments, held in conjunction with IPDPS '08, April, 2008. Published, 04/01/2008.
    http://www.informatik.uni-trier.de/~ley/db/conf/ip...
  • "Designing and Parameterizing a Workflow for Optimization: A Case Study in Biomedical Imaging,'' V. Kumar, M. Hall, J. Kim, V. Ratnakar, T. Kurc, E. Deelman, J. Saltz, Proceedings of the Workshop on Next Generation Software, held with IPDPS '08, April, 2008. Published, 04/01/2008.
    http://www.informatik.uni-trier.de/~ley/db/conf/ip...
  • "The Potential of Computation Reuse in High-Level Optimization of a Signal Recognition System,'' M. Demertzi, P. C. Diniz, M. W. Hall, A. C. Gilbert and Y. Wang, Proceedings of the Workshop on Next Generation Software, held in with IPDPS '08, April, 2008. Published, 04/01/2008.
    http://www.informatik.uni-trier.de/~ley/db/conf/ip...
  • "PERI Auto-Tuning," David H. Bailey, Jacqueline Chame, Chun Chen, Jack Dongarra, Mary Hall, Jeffrey K. Hollingsworth, Paul Hovland, Shirley Moore, Keith Seymour, Jaewook Shin, Ananta Tiwari, Sam Williams, Haihang You, Journal of Physics: Conference Series, Vol. 125, 2008. Published, 2008.
    http://www.iop.org/EJ/article/1742-6596/125/1/0120...

Presentations

  • "Challenges for the Polyhedral Community," Panel Organizer and Panelist, International Workshop on Polyhedral Compilation Techniques (IMPACT'17), held in conjunction with HiPEAC'17, Jan. 2017. Other, Presented, 01/2017.
  • "The Role of an Autotuning Compiler in Getting to Exascale," Undergraduate Program, SC'16, Nov. 2016. Invited Talk/Keynote, Presented, 11/2016.
  • "The Role of an Autotuning Compiler in Getting to Exascale," Seminar, University of Queensland (via video), Nov. 2016. Invited Talk/Keynote, Presented, 11/2016.
    https://rcc.uq.edu.au/event/793/role-autotuning-co...
  • "Getting People to Listen,'' Students@SC Short Talk, SC'16, Nov. 2016. Other, Presented, 11/2016.
  • "Programming Exascale Computers," Flash Talk, Rocky Mountain Celebration of Women in Computing, October, 2016. Other, Presented, 10/2016.
  • "Compilation for dynamic parallel languages," Panelist, Workshop on Languages and Compilers for Parallel Computing, September, 2016. Other, Presented, 09/2016.
  • "Booming Enrollments: Student Profiles/Motivations," Panel Organizer and Panelist, CRA Conference at Snowbird, July 2016. Other, Presented, 07/2016.
  • "Getting People to Listen," Programming Languages Mentoring Workshop, held in conjunction with PLDI'16, June 2016. Other, Presented, 06/2016.
  • "Compiler Optimization, Specialization and Autotuning: Achieving Productivity and High Performance for Diverse Architectures," Invited Speaker, International Workshop on Application Performance Tuning (IWAPT'16), held in conjunction with IPDPS'16, May 2016. Invited Talk/Keynote, Presented, 05/2016.
  • "Domain-Specific Optimization and Autotuning for Performance Portability of Supercomputing Applications," EE Department Colloquium Series, Brigham Young University, March 2016. Invited Talk/Keynote, Presented, 03/03/2016.
  • "How to write a good proposal: Tips, insights, and Perspective," co-presenter with Susanne Hambrusch, CRA Career Mentoring Workshop, Feb. 2016. Invited Talk/Keynote, Presented, 02/23/2016.
    http://cra.org/events/2016-career-mentoring-worksh...
  • "(When) are the polyhedral techniques necessary?," Panelist, International Workshop on Polyhedral Compilation Techniques (IMPACT'16), held in conjunction with HiPEAC'16, Jan. 2016. Other, Presented, 01/2016.
  • The Role of Compiler Optimization and Autotuning for Reducing Data Movement in High-Performance Applications," Seminar, University of Tokyo, Dec. 2015. Invited Talk/Keynote, Presented, 12/11/2015.
  • "The Role of Compiler Optimization and Autotuning for Reducing Data Movement in High-Performance Applications,'' Keynote, Legacy HPC Application Migration Workshop, held in conjunction with CANDAR 2015, Sapporo, Japan, Dec. 2015. Invited Talk/Keynote, Presented, 12/10/2015.
    http://is-candar.org/candar15/lham15
  • "Programmer Productivity for Current and Future High-Performance Architectures,'' Career Workshop for Women and Minorities in Computer Architecture, held in conjunction with ACM MICRO, Dec. 2015. Invited Talk/Keynote, Presented, 12/06/2015.
    http://safari2.ece.cmu.edu/cwwmca2015/cwwmca.htm
  • "Making the most of grad school (in HPC)," Students@SC Education Panel, SC'15. Other, Presented, 11/15/2015.
    http://sc15.supercomputing.org/conference-program/...
  • "Autotuning Compiler and Library Technology for Sparse Matrix Computations,'' Colloquium, Texas A&M University, Oct. 2015. Invited Talk/Keynote, Presented, 10/12/2015.
  • "Compiler Optimization of Computation and Communication in Stencils and Geometric Multigrid,'' Seminar, Intel Research, Santa Clara, CA, Jul. 2015. Invited Talk/Keynote, Presented, 07/27/2015.
  • "The Role of Autotuning Compiler Technology,'" Streamlining Application Performance Portability Minisymposium, SIAM Conference on Computational Science and Engineering, March, 2015. Invited Talk/Keynote, Presented, 03/18/2015.
    https://www.siam.org/meetings/cse15/
  • "Autotuning Software, Scientific Simulation and Academic Careers,'' Invited Speaker for CS Lunch and Learn (undergraduates), Rice University, Oct. 2014. Invited Talk/Keynote, Presented, 10/2014.
  • "Making Compilers Work: Autotuning for High Performance Applications,'' Colloquia speaker, University of Texas, Oct. 2014. Invited Talk/Keynote, Presented, 10/2014.
  • "Making Compilers Work: Autotuning for High Performance Applications,'' Colloquia speaker, Rice University, Oct. 2014. Invited Talk/Keynote, Presented, 10/2014.
  • "Leveraging HPC Expertise and Technology in Data Analytics," Invited speaker, Workshop on Clusters, Clouds, and Data for Scientific Computing (CCDSC '14), Sept. 2014. Invited Talk/Keynote, Presented, 09/2014.
  • "Tiling Dense and Sparse Computations for Parallelism and the Memory Hierarchy of GPUs,'' SIAM Parallel Processing Symposium, Feb. 2014. Invited Talk/Keynote, Presented, 02/2014.
    http://www.siam.org/meetings/pp14/
  • "SC13 Silver Anniversary Panel: Retrospective in Supercomputing Technologies,'' Panel Organizer and Moderator, SC13, Nov. 2013. Other, Presented, 11/2013.
    http://sc13.supercomputing.org
  • "Parallel Programming: Expressiveness and Efficiency,'' Breakout Session Organizer and Leader, Facebook Compilers Summit, Facebook, Aug. 2013. Other, Presented, 08/2013.
  • "Programming Exascale Supercomputers,'' Broader Engagement Program, SC12, November 2012. Invited Talk/Keynote, Presented, 11/11/2012.
    http://sc12.supercomputing.org/content/broader-eng...
  • "Autotuning Compiler and Language Technology and its Role in Exascale Systems,'' Invited speaker, 6th International Conference on Automatic Differentiation, July 2012. Invited Talk/Keynote, Presented, 07/25/2012.
    http://www.autodiff.org/ad12/
  • ``Automating Application Mapping with Autotuning: Paving the Way to Exascale,'' Salishan Conference on High-Speed Computing, April 2012. Invited Talk/Keynote, Presented, 04/24/2012.
    http://www.lanl.gov/orgs/hpc/salishan/index12.shtm...
  • "Autotuning Compilers: Paving the Way to Exascale", Invited Talk, Joint DOE ASCR and NNSA Exascale PI meeting, October 2011. Note: I am not a PI for these programs, but was invited to present. Invited Talk/Keynote, Presented, 10/2011.
  • "Compiler-Based Autotuning for Productive Parallel Programming and its Relationship to Design Space Exploration," High-Level Synthesis and Parallel Computation Models Work- shop held in conjunction with IEEE International Symposium on Field-Programmable Custom Computing Machines, May, 2011. Invited Talk/Keynote, Presented, 05/2011.
  • "Compiler-Based Autotuning of Energy Applications," USC-DOE Conference on Materials for Energy Applications: Experiment, Modeling and Simulations, March, 2011. Invited Talk/Keynote, Presented, 03/2011.
  • "Compiler-Based Autotuning for Productivity and High Performance," Colloquia, Ohio State University, February 2011. Invited Talk/Keynote, Presented, 02/2011.
  • A Programming Language Interface to Describe Transformations and Code Generation for Auto-Tuning," ASPLOS Program Committee Symposium, CMU. Invited Talk/Keynote, Presented, 10/2010.
  • ``Next Generation Compiler'', Panelist, DOE SciDAC Center for Scalable Application Development Software Workshop on Libraries and Autotuning for Petascale Applications. Invited Talk/Keynote, Presented, 08/2010.
  • "Compiler-Based Auto-tuning for Application and Library Code,'' DOE SciDAC Center for Scalable Application Development Software Workshop on Libraries and Autotuning for Petascale Applications. Invited Talk/Keynote, Presented, 08/2010.
  • "A Scalable Autotuning Framework for Compiler Optimization,'' A. Tiwari, C. Chen, J. Chame, M. Hall and J. K. Hollingsworth, In Proceedings of the International Parallel and Distributed Processing Symposium, May, 2009. Conference Paper, Other, 2009.
  • "Autotuning Compiler Technology to Support Architectural Diversity," Invited Seminar for Dept. of Electrical and Computer Engineering, January, 2009. Invited Talk/Keynote, Presented, 2009.
  • "Big Questions in Autotuning," Invited Talk, Center for Scalable Application Development Software Workshop on Libraries and Autotuning for Petascale Applications, August, 2009. Invited Talk/Keynote, Presented, 2009.
    http://cscads.rice.edu/workshops/summer09/autotuni...
  • "Multi-Core Software Strategies: What Approaches will Work?", Workshop on Bridging Multicore's Programmability Gap, held at SC08, November, 2008. Invited Talk/Keynote, Presented, 11/17/2008.
    http://sites.google.com/site/sc08mcoregap/
  • "The Role of Compiler Technology in Managing the Complexity of Architectures and Applications,'' SIAM Annual Meeting, July, 2008. Invited Talk/Keynote, Presented, 07/10/2008.
    http://meetings.siam.org/sess/dsp_programsess.cfm?...
  • "Multicore Chips and Parallel Programming,'' High Performance Computer Science Week, April, 2008. Invited Talk/Keynote, Presented, 04/02/2008.
    http://www.hpcsw.org/presentations/wed/hall.pdf
  • "What Role Does Code Generation and Optimization Play for Multi-Core Enablement?,'' invited panelist, International Conference on Code Generation and Optimization, April, 2008. Invited Talk/Keynote, Presented, 03/01/2008.
    http://www.cgo.org/cgo2008/
  • "Autotuning of Scientific Applications,'' 13th SIAM Conference on Parallel Processing for Scientific Computing, March, 2008. Invited Talk/Keynote, Presented, 03/01/2008.
    http://meetings.siam.org/sess/dsp_programsess.cfm?...
  • "Autotuning in the Multi-Core Era," Invited Computer Science Seminar, Brigham Young University, December, 2008. Invited Talk/Keynote, Presented, 2008.
    http://cs.byu.edu/colloquia/2008-12-11
  • "TUNE: The Structure of an Autotuning Compiler,'' Intel Academic Software Workshop, May, 2008. Invited Talk/Keynote, Presented, 2008.

Research Groups

  • Bob Wheeler, Senior Associate. School of Computing. 03/2014 - present.
  • Derick Huth, Other. 10/01/2012 - present.
  • Manu Shantharam, Postdoc. School of Computing. 08/15/2012 - 05/2014.

Software Titles

  • Codegen, Omega+, CHiLL and CUDA-CHiLL. Release of ROSE compiler port of CHiLL components, and first release of CUDA-CHiLL. Release Date: 11/10/2012. Inventors: Chun Chen, Mary Hall, Anand Venkat, Malik Khan. Distribution List: publicly available.
  • CHiLL: Composable High-Level Loop Transformation Framework, v0.1.13. Compiler Transformation Framework for Autotuning Compiler, used in DOE and NSF projects. Release Date: 09/08/2010. Inventors: Chun Chen, Mary Hall and Jacqueline Chame.