prefer to use my own photo
  • Assistant Professor, Elect & Computer Engineering

Publications

  • Tsung-Wei Huang, Dian-Lun Lin, Chun-Xun Lin & Yibo Lin (2022). Taskflow: A Lightweight Parallel and Heterogeneous Task Graph Computing System. IEEE Transactions on Parallel and Distributed Systems (TPDS). Published, 06/2022.
  • Dian-Lun Lin & Tsung-Wei Huang (2022). Accelerating Large Sparse Neural Network Inference using GPU Task Graph Parallelism. IEEE Transactions on Parallel and Distributed Systems (TPDS). Published, 04/2022.
  • Tsung-Wei Huang, Dian-Lun Lin, Yibo Lin & Chun-Xun Lin (2022). Taskflow: A General-purpose Parallel and Heterogeneous Task Programming System. IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems (TCAD). Published, 04/2022.
  • Tsung-Wei Huang & Yibo Lin (2022). Concurrent CPU-GPU Task Programming using Modern C++. IEEE International Workshop on High-level Parallel Programming Models and Supportive Environments (HIPS). Published, 03/2022.
  • Kexing Zhou, Zizheng Guo, Tsung-Wei Huang & Yibo Lin (2022). Efficient Critical Paths Search Algorithm using Mergeable Heap. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC). Published, 01/2022.
  • Jia-Ruei Yu, Chun-Hsien Chen, Tsung-Wei Huang, Jang-Jih Lu, Chia-Ru Chung, Ting-Wei Lin, Min-Hsien Wu, Yi-Ju Tseng & Hsin-Yao Wang (2022). Energy Efficiency of Inference Algorithms for Medical Datasets: A Green AI study. Journal of Medical Internet Research (JMIR). Published, 01/2022.
  • Zizheng Guo, Tsung-Wei Huang & Yibo Lin (2021). A Provably Good and Practically Efficient Algorithm for Common Path Pessimism Removal in Large Designs. IEEE/ACM Design Automation Conference (DAC). Published, 12/2021.
  • Zizheng Guo, Tsung-Wei Huang & Yibo Lin (2021). HeteroCPPR: Accelerating Common Path Pessimism Removal with Heterogeneous CPU-GPU Parallelism. IEEE/ACM International Conference on Computer-Aided Design (ICCAD). Published, 12/2021.
  • Guannan Guo, Tsung-Wei Huang, Yibo Lin & Martin Wong (2021). GPU-accelerated Critical Path Generation with Path Constraints. IEEE/ACM International Conference on Computer-Aided Design (ICCAD). Published, 12/2021.
  • Guannan Guo, Tsung-Wei Huang, Yibo Lin & Martin Wong (2021). GPU-accelerated Path-based Timing Analysis. IEEE/ACM Design Automation Conference (DAC). Published, 12/2021.
  • Tsung-Wei Huang, Chun-Yao Wang, Yu-Guang Chen & Takashi Sato (2021). Overview of 2021 CAD Contest at ICCAD. IEEE/ACM International Conference on Computer-aided Design (ICCAD). Published, 11/2021.
  • McKay Mower, Luke Majors & Tsung-Wei Huang (2021). Taskflow-San: Sanitizing Erroneous Control Flow in Taskflow Programs. IEEE Workshop on Extreme Scale Programming Models and Middleware (ESPM2). Published, 11/2021.
  • Tsung-Wei Huang (2021). TFProf: Profiling Large Taskflow Programs with Modern D3 and C++. IEEE International Workshop on Programming and Performance Visualization Tools (ProTools). Published, 11/2021.
  • Zizheng Guo, Mingwei Yang, Tsung-Wei Huang & Yibo Lin (2021). A Provably Good and Practically Efficient Algorithm for Common Path Pessimism Removal in Large Designs. IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems (TCAD). Published, 11/2021.
  • Yasin Zamani & Tsung-Wei Huang (2021). A High-Performance Heterogeneous Critical Path Analysis Framework. IEEE High-Performance Extreme Computing Conference (HPEC). Published, 09/2021.
  • Dian-Lun Lin & Tsung-Wei Huang (2021). Efficient GPU Computation using Task Graph Parallelism. European Conference on Parallel and Distributed Computing (Euro-Par). Published, 08/2021.
  • Cheng-Hsiang Chiu, Dian-Lun Lin & Tsung-Wei Huang (2021). An Experimental Study of SYCL Task Graph Parallelism for Large-Scale Machine Learning Workloads. International Workshop of Asynchronous Many-Task systems for Exascale (AMTE). Published, 08/2021.
  • Tsung-Wei Huang, Yibo Lin, Chun-Xun Lin, Guannan Guo & Martin Wong (2021). Cpp-Taskflow: A General-purpose Parallel Task Programming System at Scale. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD). Published, 08/2021.
  • Tsung-Wei Huang, Guannan Guo, Chun-Xun Lin & Martin Wong (2021). OpenTimer v2: A New Parallel Incremental Timing Analysis Engine. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD). Published, 04/2021.
  • Tsung-Wei Huang, Chun-Xun Lin & Martin Wong (2021). OpenTimer v2: A Parallel Incremental Timing Analysis Engine. IEEE Design and Test (DAT). Published, 04/2021.
  • Kuan-Ming Lai, Tsung-Wei Huang, Pei-Yu Lee & Tsung-Yi Ho (2021). ATM: A High Accuracy Extracted Timing Model for Hierarchical Timing Analysis. IEEE/ACM Asia and South Pacific Design Automation Conference (ASPDAC). Published, 01/2021.
  • Chun-Xun Lin, Tsung-Wei Huang & Martin Wong (2020). An Efficient Work-Stealing Scheduler for Task Dependency Graph. IEEE International Conference on Parallel and Distributed Systems (ICPADS). Published, 12/2020.
  • I.-C. Lin, U. Schlichtmann, Tsung-Wei Huang & M. P.-H. Lin (2020). Overview of 2020 CAD Contest at ICCAD. IEEE/ACM International Conference on Computer-aided Design (ICCAD). Published, 12/2020.
  • Tsung-Wei Huang (2020). A General-purpose Parallel and Heterogeneous Task Programming System for VLSI CAD. IEEE/ACM International Conference on Computer-aided Design (ICCAD). Published, 11/2020.
  • Zizheng Guo, Tsung-Wei Huang & Yibo Lin (2020). GPU-accelerated Static Timing Analysis. IEEE/ACM International Conference on Computer-aided Design (ICCAD). Published, 11/2020.
  • Dian-Lun Lin & Tsung-Wei Huang (2020). A Novel Inference Algorithm for Large Sparse Neural Network using Task Graph Parallelism. IEEE High-performance and Extreme Computing Conference (HPEC). Published, 09/2020.
  • Guannan Guo, Tsung-Wei Huang, Chun-Xun Lin & Martin Wong (2020). An Efficient Critical Path Generation Algorithm Considering Extensive Path Constraints. ACM/IEEE Design Automation Conference (DAC). Published, 07/2020.
  • Chun-Xun Lin, Tsung-Wei Huang, Guannan Guo & Martin Wong (2019). A Modern C++ Parallel Task Programming Library. ACM Multimedia Conference (MM). Published, 10/2019.
  • Chun-Xun Lin, Tsung-Wei Huang, Guannan Guo & Martin Wong (2019). An Efficient and Composable Parallel Task Programming Library. IEEE High-performance and Extreme Computing Conference (HPEC). Published, 09/2019.
  • Tsung-Wei Huang, Chun-Xun Lin & Martin Wong (2019). DtCraft: A High-performance Distributed Execution Engine at Scale. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD). Published, 06/2019.
  • Tsung-Wei Huang, Chun-Xun Lin, Guannan Guo & Martin Wong (2019). Essential Building Blocks for Creating an Open-source EDA Project. ACM/IEEE Design Automation Conference (DAC). Published, 06/2019.
  • Tsung-Wei Huang, Chun-Xun Lin & Martin Wong (2019). Distributed Timing Analysis at Scale. ACM/IEEE Design Automation Conference (DAC),. Published, 06/2019.
  • Kuan-Ming Lai, Tsung-Wei Huang & Tsung-Yi Ho (2019). A General Cache Framework for Efficient Generation of Timing Critical Paths. ACM/IEEE Design Automation Conference (DAC). Published, 06/2019.
  • Tsung-Wei Huang, Chun-Xun Lin, Guannan Guo & Martin Wong (2019). Cpp-Taskflow: Fast Task-based Parallel Programming using Modern C++. IEEE International Parallel and Distributed Processing Symposium (IPDPS). Published, 05/2019.
  • Tsung-Wei Huang, Chun-Xun Lin, Guannan Guo & Martin Wong (2018). A General-purpose Distributed Programming System using Data-parallel Streams. ACM Multimedia Conference (MM). Published, 10/2018.
  • Chun-Xun Lin, Tsung-Wei Huang, Guannan Guo & Martin Wong (2018). MtDetector: A High-performance Marine Traffic Detector at Stream Scale. CM International Conference on Distributed and Event-based Systems (DEBS). Published, 06/2018.
  • Chun-Xun Lin, Tsung-Wei Huang, Ting Yu & Martin Wong (2018). A Distributed Power Grid Analysis Framework from Sequential Stream Graph. ACM Great Lakes Symposium on VLSI (GLSVLSI). Published, 05/2018.
  • Chun-Xun Lin, Tsung-Wei Huang & Martin Wong (2018). Routing at Compile Time. IEEE International Symposium on Quality Electronic Design (ISQED. Published, 03/2018.
  • Tsung-Wei Huang, Chun-Xun Lin & Martin Wong (2017). DtCraft: A Distributed Execution Engine for Compute-intensive Applications. IEEE/ACM International Conference on Computer-aided Design (ICCAD). Published, 11/2017.
  • T.-Y. Lai, Tsung-Wei Huang & Martin Wong (2017). Libabs: An Effective and Accurate Macro-modeling Algorithm for Large Hierarchical Designs. IEEE/ACM Design Automation Conference (DAC). Published, 06/2017.
  • Tsung-Wei Huang & Martin Wong (2016). UI-Timer 1.0: An Ultra-Fast Path-Based Timing Analysis Algorithm for CPPR. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD). Published, 11/2016.
  • Tsung-Wei Huang, Martin Wong, D. Sinha, K. Kalafala & N. Venkateswaran (2016). A Distributed Timing Analysis Framework for Large Designs. IEEE/ACM Design Automation Conference (DAC). Published, 06/2016.
  • Tsung-Wei Huang & Martin Wong (2015). OpenTimer: A High-Performance Timing Analysis Tool. IEEE/ACM International Conference on Computer-Aided Design (ICCAD). Published, 11/2015.
  • Tsung-Wei Huang & Martin Wong (2015). On Fast Timing Closure: Speeding Up Incremental Path-Based Timing Analysis with MapReduce. IEEE/ACM International Workshop on System Level Interconnect Prediction (SLIP). Published, 06/2015.
  • Tsung-Wei Huang & Martin Wong (2015). Accelerated Path-Based Timing Analysis with MapReduce. ACM International Symposium on Physical Design (ISPD). Published, 03/2015.
  • Tsung-Wei Huang, P.-C. Wu & Martin Wong (2014). UI-Timer: An Ultra-Fast Clock Network Pessimism Removal Algorithm. IEEE/ACM International Conference on Computer-Aided Design (ICCAD). Published, 11/2014.
  • Tsung-Wei Huang, P.-C. Wu & Martin Wong (2014). Fast Path-Based Timing Analysis for CPPR. IEEE/ACM International Conference on Computer-Aided Design (ICCAD). Published, 11/2014.
  • S.-H. Yeh, J.-W. Chang, Tsung-Wei Huang, S.-T. Yu & Tsung-Yi Ho (2014). Voltage-Aware Chip-Level Design for Reliability-Driven Pin-Constrained EWOD Chips. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD). Published, 09/2014.
  • Tsung-Wei Huang, P.-C. Wu & Martin Wong (2014). UI-Route: An Ultra-Fast Incremental Maze Routing Algorithm. IEEE/ACM International Workshop on System Level Interconnect Prediction (SLIP). Published, 06/2014.
  • J.-W. Chang, S.-H. Yeh, Tsung-Wei Huang & Tsung-Yi Ho (2013). An ILP-based Routing Algorithm for Pin-Constrained EWOD Chips with Obstacle Avoidance. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD). Published, 11/2013.
  • Y.-H. Chen, C.-L. Hsu, L.-C. Tsai, Tsung-Wei Huang & Tsung-Yi Ho (2013). A Reliability-Oriented Placement Algorithm for Reconfigurable Digital Microfluidic Biochips Using 3D Deferred Decision Making Technique. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD). Published, 08/2013.
  • J.-W. Chang, S.-H. Yeh, Tsung-Wei Huang & Tsung-Yi Ho (2013). Integrated Fluidic-Chip Co-Design Methodology for Digital Microfluidic Biochips. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD). Published, 02/2013.
  • S.-H. Yeh, J.-W. Chang, Tsung-Wei Huang & Tsung-Yi Ho (2012). Voltage-Aware Chip-Level Design for Reliability-Driven Pin-Constrained EWOD Chips. IEEE/ACM International Conference on Computer-Aided Design (ICCAD). Published, 11/2012.
  • Tsung-Wei Huang, J.-W. Chang & Tsung-Yi Ho (2012). Integrated Fluidic-Chip Co-Design Methodology for Digital Microfluidic Biochips. ACM International Symposium on Physical Design (ISPD). Published, 03/2012.
  • Jia-Wei Chang, Tsung-Wei Huang & Tsung-Yi Ho (2012). An ILP-based Obstacle-Avoiding Routing Algorithm for Pin-Constrained EWOD Chips. IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC). Published, 03/2012.
  • Tsung-Wei Huang, S.-Y. Yeh & Tsung-Yi Ho (2011). A Network-Flow Based Pin-Count Aware Routing Algorithm for Broadcast-Addressing EWOD Chips. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD). Published, 12/2011.
  • Tsung-Wei Huang, Tsung-Yi Ho & K. Chakrabarty (2011). Reliability-Oriented Broadcast Electrode-Addressing for Pin-Constrained Digital Microfluidic Biochips. IEEE/ACM International Conference on Computer-Aided Design (ICCAD). Published, 11/2011.
  • Tsung-Wei Huang & Tsung-Yi Ho (2011). Recent Research and Emerging Challenges in the Designs and Optimizations for Digital Microfluidic Biochips. Proceeding of IEEE System on Chip Conference (SOCC). Published, 09/2011.
  • Tsung-Wei Huang, Yan-You Lin, Jia-Wei Chang & Tsung-Yi Ho (2011). Chip-Level Design and Optimization for Digital Microfluidic Biochips. Proceeding of IEEE International Midwest Symposium on Circuits and Systems (MWSCAS). Published, 08/2011.
  • Tsung-Wei Huang, H.-Y. Su & Tsung-Yi Ho (2011). Progressive Network-Flow Based Power-Aware Broadcast Addressing for Pin-Constrained Digital Microfluidic Biochips. ACM/IEEE Design Automation Conference (DAC). Published, 06/2011.
  • P.-H. Yuh, C.-Y Lin, Tsung-Wei Huang, Tsung-Yi Ho, C.-L. Yang & Yao-Wen Chang (2011). A SAT-Based Routing Algorithm for Cross-Referencing Biochips. IEEE/ACM International Workshop on System Level Interconnect Prediction (SLIP). Published, 06/2011.
  • Tsung-Wei Huang & Tsung-Yi Ho (2011). A Two-Stage ILP-Based Droplet Routing Algorithm for Pin-Constrained Digital Microfluidic Biochips. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD). Published, 02/2011.
  • Tsung-Wei Huang, C.-H. Lin & Tsung-Yi Ho (2010). A Contamination Aware Droplet Routing Algorithm for the Synthesis of Digital Microfluidic Biochips. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD). Published, 11/2010.
  • Tsung-Wei Huang, S.-Y. Yeh & Tsung-Yi Ho (2010). A Network-Flow Based Pin-Count Aware Routing Algorithm for Broadcast Electrode-Addressing EWOD Chips. IEEE/ACM International Conference on Computer-Aided Design (ICCAD). Published, 11/2010.
  • Tsung-Wei Huang & Tsung-Yi Ho (2010). A Two-Stage ILP-Based Droplet Routing Algorithm for Pin-Constrained Digital Microfluidic Biochips. ACM International Symposium on Physical Design (ISPD). Published, 03/2010.
  • Tsung-Wei Huang, C.-H. Lin & Tsung-Yi Ho (2009). A Contamination Aware Droplet Routing Algorithm for Digital Microfluidic Biochips. IEEE/ACM International Conference on Computer-Aided Design (ICCAD). Published, 10/2009.
  • Tsung-Wei Huang & Tsung-Yi Ho (2009). A Fast Routability- and Performance-Driven Droplet Routing Algorithm for Digital Microfluidic Biochips. IEEE International Conference on Computer Design (ICCD). Published, 10/2009.

Research Statement

My research group creates novel software systems to streamline the building of high-performance parallel and heterogeneous computing applications. We focus on a multidisciplinary area of scientific computing, electronic design automation, and machine learning. We have released several open-source software (TaskflowOpenTimerDtCraftSNIG) that is being used by many industrial and academic projects (>1M downloads & 5000+ GitHub stars). 

Research Keywords

  • Software Development
  • High Performance Computing
  • Data Science and Machine Learning
  • Computer-Aided Design (CAD)

Presentations

  • "Intelligent Heterogeneous Computing," ECE Distinguished Lecture, Stevens Institute of Technology. Invited Talk/Keynote, Presented, 02/2022.
  • "Intelligent Heterogeneous Computing," ECE Department, University of Minnesota. Invited Talk/Keynote, Presented, 10/2021.
  • "cudaFlow: A Modern C++ Programming Model for GPU Task Graph Parallelism," CppCon. Invited Talk/Keynote, Presented, 10/2021.
  • "Taskflow: A General-purpose Parallel and Heterogeneous Task Programming System," IXPUG. Invited Talk/Keynote, Presented, 10/2021.
  • "Taskflow: Parallel and Heterogeneous Task Graph Computing," CUHK (Evan's group). Invited Talk/Keynote, Presented, 08/2021.
  • "General Heterogeneous Framework for Path-based Timing Analysis," Cadence. Invited Talk/Keynote, Presented, 07/2021.
  • "HeteroTime: Accelerating Static Timing Analysis with GPU," Nvidia Research. Invited Talk/Keynote, Presented, 06/2021.
  • "Taskflow: A Lightweight Heterogeneous Task Programming System with Control Flow," CPPNow. Invited Talk/Keynote, Presented, 05/2021.
  • "Machine Learning System-enabled GPU Acceleration for EDA," VLSI-DAT. Invited Talk/Keynote, Presented, 04/2021.
  • "GPU-accelerated Static Timing Analysis and Beyond," GTC. Invited Talk/Keynote, Presented, 04/2021.
  • "GPU-Accelerated Static Timing Analysis," UCSC EDA Seminar. Invited Talk/Keynote, Presented, 02/2021.
  • "A General-purpose Parallel and Heterogeneous Task Programming System," CIE/USA-GNYC. Invited Talk/Keynote, Presented, 10/2020.
  • "Taskflow: A General-purpose Parallel and Heterogeneous Task Programming System," CppIndia. Invited Talk/Keynote, Presented, 10/2020.
  • "Taskflow: Parallel and Heterogeneous Task Programming in C++," C++ Programmer Meetup. Invited Talk/Keynote, Presented, 10/2020.
  • "Taskflow: A General-purpose Parallel and Heterogeneous Task Programming System," MUC++. Invited Talk/Keynote, Presented, 10/2020.
  • "Taskflow: A General-purpose Parallel and Heterogeneous Task Programming System," CppCon. Invited Talk/Keynote, Presented, 09/2020.
  • "Programming Systems for Parallelizing VLSI CAD and Beyond," VLSI-DAT. Invited Talk/Keynote, Presented, 04/2020.
  • "A General-purpose Parallel and Heterogeneous Task Programming System at Scale," ORNL. Invited Talk/Keynote, Presented, 03/2020.
  • "Growing Your Open-Source Projects," WOSET at IEEE/ACM ICCAD. Invited Talk/Keynote, Presented, 11/2019.
  • "Essential Building Blocks for Creating an Open-source EDA Project," IEEE/ACM DAC. Invited Talk/Keynote, Presented, 06/2019.
  • "Task-based Parallel Programming using Modern C++", CSL Social Hour. Invited Talk/Keynote, Presented, 09/2018.
  • "Distributed Timing Analysis in 100 Lines Code," VSD webinar. Invited Talk/Keynote, Presented, 05/2018.
  • "DtCraft: A High-performance Distributed Execution Engine at Scale," CSLSC, UIUC. Invited Talk/Keynote, Presented, 01/2018.
  • "OpenTimer: An open-source high-performance timing analysis tool," ORCONF, Bologna, Italy. Invited Talk/Keynote, Presented, 10/2016.
  • "Distributed Timing Analysis: Framework and Systems," Cadence, Austin. Invited Talk/Keynote, Presented, 06/2016.
  • "OpenTimer: A High-performance Timing Analysis Tool," Special Session, IEEE/ACM ICCAD. Invited Talk/Keynote, Presented, 11/2015.
  • "Fast Path-based Timing Analysis," Special Session, IEEE/ACM ICCAD. Invited Talk/Keynote, Presented, 11/2014.

Research Groups

  • Dian-Lun Lin, Graduate Student. Department of Electrical and Computer Engineering / PhD. 01/16/2020 - present.
  • Cheng-Hsiang Chiu, Graduate Student. Department of Electrical and Computer Engineering / PhD. 08/16/2020 - present.
  • Wan-Luan Lee, Graduate Student. Department of Electrical and Computer Engineering / PhD. 01/01/2022 - present.
  • Che Chang, Graduate Student. Department of Electrical and Computer Engineering / PhD. 01/01/2022 - present.
  • Yasin Zamani, Graduate Student. Department of Electrical and Computer Engineering / MS. 08/16/2020 - 12/31/2021.
  • Elmir Dzaka, Undergraduate Student. Department of Electrical and Computer Engineering / BS. 02/16/2022 - 05/16/2022.
  • McKay Mower, Undergraduate Student. Department of Electrical and Computer Engineering / BS. 05/16/2021 - 08/16/2021.
  • Luke Majors, Undergraduate Student. Department of Electrical and Computer Engineering / BS. 05/16/2021 - 08/16/2021.

Languages

  • Chinese, fluent.
  • English, fluent.
  • Taiwan Sign Language, fluent.

Geographical Regions of Interest

  • Americas
  • Taiwan

Software Titles

  • Taskflow: A General-purpose Parallel and Heterogeneous Task Graph Programming System. Taskflow streamlines the building of high-performance parallel and heterogeneous computing applications. https://github.com/taskflow/taskflow. Release Date: 08/01/2018. Inventors: Tsung-Wei Huang.
  • OpenTimer: A High-performance Static Timing Analysis Tool. OpenTimer is a new static timing analysis (STA) tool to help IC designers quickly verify the circuit timing. GitHub: https://github.com/OpenTimer/OpenTimer. Release Date: 08/01/2018. Inventors: Tsung-Wei Huang.