RICHARD B BROWN portrait
  • Professor, Elect & Computer Engineering
  • Professor, School Of Computing
  • Adjunct Professor, Bioengineering

Research Statement

Prof. Brown and his students develop silicon-based liquid chemical sensors of many kinds for ions, heavy metals and neurochemicals. His group was first to incorporate chemical sensing technology on silicon-based neural probes. Their work in neural interfaces also involved placing arrays of microelectrodes on the surface of the human motor cortex; ten spoken words were differentiated with good predictability from the brain surface signals. Prof. Brown’s research group develops low-power mixed-signal microcontrollers to serve as single-chip interface instruments for solid-state sensors. These microcontrollers have included full analog front-ends, a DSP block for processing sound for cochlear prostheses, and an on-chip oscillator that eliminated the need for a crystal-based clock.

 

Research Keywords

  • Microprocessors
  • Integrated Circuits
  • Chemical Sensors

Presentations

  • “Economic Benefits of Government Investments in Engineering,” Impact of Federal R&D, Engineering Deans Public Policy Colloquium, Washington, D.C. Invited Talk/Keynote, Presented, 02/07/2017.
  • "Faculty Involvement", 2015 Commercialization Interchange, Technology & Venture Commercialization, session discussion co-led with Glenn Prestwich. Other, Other, 10/15/2015.
  • “Commercialization Support at the University of Utah,” Entrepreneurship and Innovation, Engineering Deans Institute, Kiawah Island, SC. Invited Talk/Keynote, Presented, 04/13/2015.
  • "Helping Meet the Engineering Needs of Hill Field Air Force Base". Hill Field Management Awards Ceremony. Invited Talk/Keynote, Presented, 03/04/2015.
  • "Dielectric and Inductive Sensing Using Fringing Electromagnetic Fields From Temperature-Stabilized LC Oscillators", Nathaniel Gaskin, Richard Brown, IEEE Sensors 2014, Valencia, Spain. Conference Paper, Refereed, Presented, 11/05/2014.
  • Engineering a Healthier World, BYU Honored Alumnus Presentation, October 16, 2014, Provo, Utah. Invited Talk/Keynote, Presented, 10/16/2014.
  • I. R. Harvey, F. Solzbacher, B. Gale, T. Parks, R. Brown, USTAR / U of U / COE Partnerships to Spur R&D in micro/nano Materials & Systems, COMS / NanoUtah SLC 15 . Conference Paper, Refereed, Presented, 10/2014.
  • "The College of Engineering at the University of Utah", University of Utah, Electrical and Computer Engineering Department Graduate Seminar. Invited Talk/Keynote, Other, 09/29/2014.
  • "Instrumenting the Human Body", Seminar presentation jointly sponsored by Michigan Technological University's College of Engineering and the Departments of Bio-medical Engineering and Electrical and Computer Engineering. Invited Talk/Keynote, Presented, 09/22/2014.
  • "Growing Engineering for Defense". Society of American Military Engineers Annual Scholarship Awards Banquet, Great Basin Post, Hill Air Force Base, Utah. Invited Talk/Keynote, Presented, 02/12/2014.
  • Richard B. Brown, "University of Utah College of Engineering," Western ECE Department Chairs' Meeting, Salt Lake City, UT, Sept. 21, 2013. Invited Talk/Keynote, Presented, 09/21/2013.
  • Richard B. Brown, "Revolutionizing Chemical Sensing with Silicon Sensor Arrays, "Silicon Innovation Forum, SEMICON West Silicon Innovation Forum, July 9, 2013. Conference Paper, Refereed, Presented, 07/09/2013.
  • Richard B. Brown, "MIcrosystem Technology for Neural Interfaces," Micro/nano Systems and Technology Seminar Series, Auburn University, Auburn, AL. Invited Talk/Keynote, Presented, 10/11/2012.
  • Randy Bryant, Richard B. Brown, Ronald L. Larsen, Jeffrey S. Vitter, Robert B. Schnabel, and Zvi Galil, "Managing Up - Partnering with your Dean," Panel Discussion, 40th CRA Snowbird Conference, Snowbird, UT. Other, Presented, 07/24/2012.
  • Richard B. Brown, "Innovation, Entrepreneurism, Jobs & Commerce: Why is the University of Utah so Successful?" Sid Green Alta Club Forum, Salt Lake City, UT. Other, Presented, 04/26/2012.
  • Richard B. Brown, "Creating a Culture of Entrepreneurship," ASEE Engineering Dean's Institute, Kauai, Hawaii. Invited Talk/Keynote, Presented, 04/17/2012.
    http://www.asee.org/sli_brown_entrepreneurship.pdf
  • Richard B. Brown, "Biosensors for the Brain," SRC/SFI/NSF Forum on Integrated Sensors for Cybersystems - FISC 2030 (by invitation), Carton House, Maynooth, Co. Kildare, Ireland. Invited Talk/Keynote, Presented, 03/22/2012.
    http://www.src.org/calendar/e004576/brown.pdf
  • Richard B. Brown, "Engineering a Healthier World: Helping the dumb to speak, the lame to walk, and the blind to see", BYU-Idaho University Forum, Rexburg ID, November 18, 2010. Invited Talk/Keynote, Presented, 11/18/2010.
  • Richard B. Brown, "ECE as a Career in the 21st Century", Honored Distinguished Alumnus talk, Brigham Young University, Provo UT, Oct. 14, 2010. Invited Talk/Keynote, Presented, 10/14/2010.
  • Richard B. Brown, "Engineering as a Career in the 21st Century", Energy Solutions Scholarship Banquet, May 15, 2010. Invited Talk/Keynote, Presented, 05/15/2010.
  • Richard B. Brown, "Silicon Electrochemical Neurosensors", Korea Technology Industry Co., Technology Research Center, Seoul, Korea, Sept. 26, 2008. Invited Talk/Keynote, Other, 09/26/2008.
  • Richard B. Brown, "Silicon Electrochemical Neurosensors", Global Management of Technology Conference 2008, Seoul, Korea, Sept. 25, 2008, slides pp. 189-210. Invited Talk/Keynote, Presented, 09/25/2008.
  • Richard B. Brown, "Electrochemical Neurosensor Systems", seminar at Georgia Institute of Technology, May 27, 2008. Invited Talk/Keynote, Other, 05/27/2008.
  • "Sensor Interface Electronics", Iowa State University, Ames IA, Nov. 19, 2007. Invited Talk/Keynote, Presented, 11/17/2007.
  • "Silicon Electrochemical Neurosensor Arrays", University of Puerto Rico, Mayaguez Campus, San Juan Puerto Rico, April 17, 2007. Invited Talk/Keynote, Presented, 04/27/2007.
  • Amlan Ghosh, Rahul M. Rao, Ching-Te Chuang, and Richard B. Brown, "On-chip Process Variation Detection and Compensation for Parametric Yield Enhancement in sub-100nm CMOS technology," Proceedings of the 8th Annual Austin CAS Conference, March 2, 2007, p. 1-4. Other, Presented, 02/2007.
  • Timothy D. Strong, Steven M. Martin, Robert K. Franklin, Richard Brown, "Integrated Electrochemical Neurosensors", IEEE International Symposium on Circuits and Systems, Island of Kos, Greece, May 21-24, 2006, pp. 4110-4113. Invited Talk/Keynote, Presented, 2006.
  • M.D. Johnsons, M.D. Gibson, LG. Salas, R.K. Franklin, R.B. Brown, D.R. Kipke, "Spatiotemporal Neurochemical and Electrophysiological Recordings in Rodents", Neural Interface Workshop, Bethesda, MD, August 2006. Other, Presented, 2006.

Research Groups

  • Ondrej Novak, Graduate Student. ECE. 04/2011 - 05/2015.
  • Nathaniel Gaskin, Graduate Student. ECE. 08/2005 - present.

Research Equipment and Testing Expertise

  • Verigy 93000.

Languages

  • Finnish, functional.

Geographical Regions of Interest

  • Finland
  • Republic of Korea

Patents

  • Microsensor with a well having a membrane disposed therein (#7,438,851). Status: Issued. Inventors: Robert W. Hower, Richard B. Brown. File date 04/30/2004; Issue date 10/21/2008. Assignee: The Regents of the University of Michigan.
  • Microsystem for Determining Clotting Time of Blood and Low-Cost, Single-Use Device for Use Therein (#7,291,310). Status: Issued. Inventors: Steven M. Martin, Roy Olsson III, Richard B. Brown, Robert K. Franklin. File date 12/16/2003; Issue date 11/06/2007. Assignee: The Regents of the University of Michigan.
  • MEMS-Based, Computer Systems, Clock Generation and Oscillator and LC-Tank Apparatus for Use Therein (#7,157,984 B2). Status: Issued. Inventors: Michael S. Mcorquodale, Richard B. Brown. File date 10/28/2005; Issue date 01/02/2007. Assignee: The Regents of the University of Michigan.
  • Linearizing Apparatus and Method` (#7,132,874). Status: Issued. Inventors: Michael S. McCorquodale, Richard B. Brown, Mei Kim Ding. File date 04/22/2004; Issue date 11/07/2006. Assignee: The Regents of the University of Michigan.
  • Ultra High Frequency Ring Oscillator with Voltage Controlled Frequency Capabilities (#7,113,048). Status: Issued. Inventors: Richard B. Brown, Gary D. Carpenter, Fadi H. Gebara. File date 11/12/2004; Issue date 09/26/2006. Assignee: IBM Corp.
  • MEMS-Based, Computer Systems, Clock Generation and Oscillator Cirduits and LC-Tank Apparatus for Use Therein (#6,972,635). Status: Issued. Inventors: Michael S. McCorquodale, Richard B. Brown. File date 02/26/2003; Issue date 12/06/2005. Assignee: The Regents of the University of Michigan.
  • Method of Reducing Leakage Current in Sub One Volt SOI Circuits (#6,952,113). Status: Issued. Inventors: Richard B. Brown, Ching-Te K. Chuang, Peter W. Cook, Koushik K. Das, Rajiv V. Joshi. File date 08/20/2003; Issue date 10/04/2005. Assignee: IBM Corp.
  • Low-Leakage Integrated Circuits and Dynamic Logic Circuits (#6,933,744). Status: Issued. Inventors: Koushik K. Das, Richard B. Brown. File date 06/10/2003; Issue date 08/23/2005. Assignee: University of Michigan.
  • Laminated Devices and Methods of Making the Same (#6,786,708). Status: Issued. Inventors: Richard B. Brown, Steven M. Martin. File date 07/13/2002; Issue date 09/07/2004. Assignee: The Regents of the University of Michigan.
  • Micromachined Device for Receiving and Retaining at Least One Liquid Droplet, Method of Making the Device and Method of Using the Device (#6,764,652). Status: Issued. Inventors: Robert W. Hower, Richard B. Brown. File date 01/24/2001; Issue date 07/20/2004. Assignee: The Regents of the University of Michigan.
  • Batch Deposition of Polymeric Ion Sensor Membranes (#5,607,566). Status: Issued. Inventors: Richard B. Brown, Geun Sig Cha, Howard D. Goldberg. File date 10/03/1994; Issue date 03/04/1997. Assignee: The Board of Regents of The University of Michigan.
  • High Speed Current Mirror Memory Cell Architecture (#5,490,105). Status: Issued. Inventors: Ajay Chandna, Richard B. Brown. File date 09/27/1994; Issue date 02/06/1996. Assignee: Regents of The University of Michigan.
  • Solid State Ion Sensor with Polyimide Membrane (#5,417,835). Status: Issued. Inventors: Richard B. Brown, Geun Sig Cha. File date 10/14/1993; Issue date 05/23/1995. Assignee: The Board of Regents of The University of Michigan.
  • Solid State Ion Sensor with Silicone Membrane (#5,102,526). Status: Issued. Inventors: Richard B. Brown, Geun Sig Cha. File date 05/02/1990; Issue date 04/07/1992. Assignee: University of Michigan.

Research

Research

 Prof. Brown conducts research in two general areas, solid-state sensors and integrated circuits.  In the sensor work, he has enjoyed fruitful collaborative relationships with researchers in chemistry and medicine.  Brief summaries of the major accomplishments of his research group follow in related sub-areas ranging from sensors to microprocessors.  Ph.D. students’ (and post-docs’*) names are listed with the area most closely aligned to their dissertations to aid in identifying the publications related to each topic.

Chemical Sensors: (H. Goldberg, M. Ger, H. Cantor, G.S. Cha*, R. Hower, S. Martin, S. Joo*, K. Campbell)

Prof. Brown started working in the area of solid-state liquid chemical sensors in his own Ph.D. research at the University of Utah. Under the direction of Prof. Robert Huber, with Jiri Janata as a very involved member of his committee, he developed a miniature silicon-based chemical sensor array with on-chip electronics.  In this project, he developed a junction-isolated NMOS semiconductor process and designed an eight-ion-sensor array using ionophore-doped polymeric membranes, in which the signal from each sensor electrode was buffered by an integrated operational amplifier.  This first-of-a-kind smart chemical sensor included digital control circuitry and an analog multiplexor which reduced the number of interface connections needed to seven, which fit on the narrow (1.4 mm) end of the rectangular sensor chip.  The junction isolation allowed the sensor chip to be used in solution with only the bond-wire end of the chip encapsulated.  The use of integrated electronics improved the signal to noise ratio by more than three orders of magnitude, and facilitated the concurrent use of multiple sensors selective to different chemicals.  This chip generated all of the data needed to implement chemometrics techniques for reducing errors due to imperfect selectivity of the ionophore-based transducers.

As a faculty member at the University of Michigan, Prof. Brown, with his students, continued to solve the fundamental problems in solid-state chemical sensors.  They optimized ion-selective membranes for all of the simple ions based on polyurethane and silicone matrices that had vastly improved biocompatibility and adhesion to the substrate compared to the commonly-used PVC.  They developed mass fabrication processes that yielded membranes having precisely controlled dimensions and electrochemical characteristics.  They developed a Silicon-on-Insulator (SOI) semiconductor process to give intrinsic encapsulation to these devices that must operate in conductive solution without shorting high impedance signals to the solution.  Throughout the sensor research, novel packaging approaches were developed.  The SOI process included a p-i-n photodiode that was used to implement an optically-coupled sensor for detecting alcohol and other non-ionic species.  A smart sensor chip was fabricated in this SOI process that included an analog multiplexor, a programmable gain amplifier, a 12-bit analog-to-digital converter, digital control circuitry, and a standard serial interface to a computer -- the whole instrument was on the sensor chip. 

Solid-state conductivity sensors were developed for quantifying hematocrit levels and the ionic strengths of other fluids.  Enzymatically- and immunologically-coupled sensors were demonstrated.  Amperometric sensors were developed for detecting and determining the concentrations of neurochemicals (dopamine, serotonin, acetylcholine), heavy metals (arsenic, lead), and any of a host of other molecules that have well-defined redox potentials which lie within the water window.  With stripping voltammetry, these sensors were able to detect Arsenic at levels as low as 0.3 parts per billion.  These sensors were also integrated with electronics, this time using commercially processed CMOS circuits as the substrate; post-processing steps developed in Prof. Brown’s lab were employed to form the sensors on top of the circuitry.  A model of the full sensor/electronics system was developed to evaluate the noise and optimize the sensor and circuit design.  One of the circuits developed and integrated with the sensor was a fully differential potentiostat, which doubled the effective voltage swing available for driving the redox reactions, thereby allowing the electronics to be implemented in modern, fine-featured, low-voltage semiconductor processes.  Multiple sensor types were merged onto the same chip to achieve a wide range of sensing capabilities. 

With a portfolio of patents generated from this work, Prof. Brown was involved in founding two companies, i-SENS and Sensicore, which commercialized the solid-state sensor technology. i-SENS, headquartered in Seoul, Korea, manufactures and markets glucose sensors and glucometers throughout the world.  It has a capacity to make 1B sensors per year in a new factory in Wonju City, Korea.  The company has also developed a bed-side blood gas and electrolyte instrument that will soon be manufactured in a new factory in the Incheon Free Economic Zone.  Sensicore, founded in Ann Arbor, MI, focused on water sensing with a hand-held instrument based upon a single silicon sensor chip that quantifies 18 components/parameters of clean water.  The company had more than $30M of venture capital, and was sold to GE Water and Process Technologies in April of 2008. 

Since being back at the University of Utah, Prof. Brown and his group, with Profs. Cha and Nam from Kwangwoon University, have developed several novel reference electrodes that can be miniaturized to sizes comparable to those of the sensors.  Working with Prof. Henry White’s team in Chemistry, they  developed the world’s smallest man-made potentiometric sensor, a nanopore-based device that was used as a scanning chemical microscope to plot the ion flux passing through an opening the size of a human skin pore.  Prof. Brown’s group has developed silicon-based nanopore sensors that can be mass-fabricated with varying, well-controlled pore sizes. The devices have metal electrodes in isolated cavities behind the nanopores.  These structures will be the basis of nano-potentiometric sensors, nano-amperometric sensors, and nano particle sizers/counters.  The isolated cavities with independent Pt and IrOx electrodes will make possible the concurrent operation of these various sensor types in an array, including multiple particle counters having different size ranges, and concurrently counting particles of opposite polarity.  Such a device will find many applications in environmental water and air quality testing, national security applications, and nano- and bio-technology research.

Neural Interfaces: (H. Cantor, T. Strong, R. Franklin, S. Kellis)

Prof. Brown’s work in neural sensors started as an effort to apply his group’s chemical sensing technology to silicon-based brain probes which, at that time, detected only electrical signals.  Communication between neurons happens, of course, through both electrical and chemical means, so adding the ability to identify and quantify the neurochemical concentrations in the vicinity of a neuron, along with the electrical spikes, could greatly enhance the understanding of neuron behavior.  Their first design was a silicon-based, microfabricated, passive, in vitro array organized in a 4 x 4 pattern, in which each sensor used an electrode for sensing the action potential, and with other electrodes formed a voltammetric sensor for monitoring neurochemicals. Five versions of this array were made, with electrode sizes ranging from 2 to 100 mm.  The sensor array was packaged in a ceramic integrated circuit pin grid array package with lead wires encapsulated, and a small cloning chamber cemented to the sensor chip surface.  Human stem cells (hNT cell line from Stratagene) were plated onto the surface over an appropriate matrix, and cultured into neurons.  Neurons from this cell line produce spontaneous electrical activity, and secrete acetylcholine and dopamine.  Calibration curves for dopamine taken in culture media indicated detection limits for dopamine below 100nM.  Neuroelectrical and neurochemical recordings were taken on 24 cell cultures over 75 days.  Action potential propagation from neuron to neuron was evident in the data.  Electrical spikes and chemical response were correlated in many instances.  A cell behavior known as potentiation, in which a neuron fires to prime or activate a particular neural pathway was exhibited in the data; a succeeding pulse causes a larger reaction because of the initial priming.  The capture of such events, with multiple action potential spikes in rapid succession followed by a large release of neurotransmitter, highlights the capability of the devices for use in studying the interdependence of neuroelectrical and neurochemical behaviors.  This was, to our knowledge, the first case of recording such data without external stimulation.  A complete computer model of the sensor’s electrochemical behavior was developed for use in optimizing interface electronics.  To improve signal fidelity, CMOS potentiostats were integrated into the sensor using the post-processing approach mentioned in the Chemical Sensors section above. 

After returning to Utah, Prof. Brown and his students implemented their neurosensors as in vivo brain probes that could concurrently detect neurochemical and electrophysiological signals.  They studied various materials as they sought a biocompatible reference electrode for neuroprobes, and eventually developed an activated Iridium Oxide Film electrode with excellent characteristics for use in sensing neurochemicals.  Silicon needle probes were designed with Pt and IrOx electrodes on the same shank in appropriate configurations for concurrently measuring local field potentials, action potentials, and neurochemical concentrations.  The probes were coated with the perfluorinated ion-exchange resin Nafion to improve selectivity of the platinum sites to more than 100:1 for dopamine over interfering species. The multi-modal probes were implanted in the striatum of urethane-anesthetized rats to examine reciprocal influences of amperometry on neuronal activity, and spatiotemporal characteristics of dopamine effluence vs. local field potential and spike activity following electrical stimulation of the medial forebrain bundle (MFB).  The utility of these probes for neuroscience studies was demonstrated as extra-synaptic dopamine overflow in the striatum was correlated with local field potentials and electrical spike activity, driven by the frequency and amplitude of electrical stimulation of the MFB.  These probes are now being made available commercially through NeuroNexus Technologies, Ann Arbor, MI, a company founded by Prof. Brown’s collaborator, Daryl Kipke.

Chronic implantation of neural probes is problematic because as the probes move in the soft brain tissue, they see signals from different neurons, necessitating constant retraining of the decoder.  Furthermore, biology tries to encapsulate the foreign body, insulating its sensing electrodes from the signals.  To achieve better chronic performance of a brain-machine interface, Prof. Brown and his student, Spencer Kellis, in conjunction with neurosurgeon Paul House and Bradley Greger in Bioengineering, have experimented with tiny (40 mm micro electrocorticographic or ECoG) electrodes placed on the surface of the brain.  Experiments were conducted to determine whether non-penetrating, high-density microwire electrodes could provide sufficient information to serve as the interface for decoding motor cortical signals.  These electrode arrays were implanted over the motor cortex in epilepsy patients who performed reaching movements with a computer mouse while data were recorded.  The whole array of 16 electrodes fits in the area normally occupied by a single standard ECoG electrode.  It was learned that the electrodes are capable of recording predominantly linearly-independent data if placed 2mm or more apart.   Signals from cortical columns, sensed by the micro ECoG electrodes, were filtered into frequency ranges, and the amount of power in each band was monitored.  Principle component analysis of the filtered and binned data was used to distinguish between the two movements.  The gamma band power at 30-40 Hz increased substantially beginning 500 mS before movement in the contralateral direction; movements in the ipsilateral direction corresponded to a general attenuation in power over the gamma band.  The algorithm was able to predict with good accuracy which direction the patient was going to move his arm.  While the studies to date involved movement of the arm, the inter-electrode spacing was designed to allow for the decoding of individual finger and hand movements, hopefully enabling the dextrous intuitive control of a prosthetic arm and hand.  More detailed studies using both hand and arm movement tasks and more sophisticated decode paradigms will be needed to validate the applications of the non-penetrating electrode arrays.  The group’s latest sensing accomplishment, first reported at the Society for Neuroscience meeting October 18, 2009, is the first differentiation of spoken words using non-penetrating electrodes.  Their hope is that this technology will lead to an option for locked-in patients to communicate.  Prof. Brown’s group is developing a low-power mixed-signal microprocessor to serve as an implanted interface to micro ECoG arrays (see below).

Electronic Circuit Clocking: (P. Stetson, A. Drake, F. Gebara, M. McCorquodale, N. Gaskin)

All synchronous digital systems employ a clock to pace the operation of the circuit.  In modern integrated circuits, the clock design has a major effect on both the speed and power dissipation of the circuit.  Prof. Brown’s group has contributed in several ways to improved integrated circuit clocking.  In the mid 1990s, as microprocessors became faster than the clocks that could be distributed on printed circuit boards, phase-locked loops, which multiply the clock frequency, became necessary on-chip modules.  The group designed CMOS and Complementary Gallium Arsenide (CGaAs) digital phase-locked loops and delay-locked loops (which align the phase but do not change the frequency) that employed current-steering logic and novel low-voltage circuit techniques to achieve the best phase noise results for a given operating voltage reported to that date.  This work included a new simulation technique for analyzing phase jitter.  As microprocessor clock frequencies continued to rise, there was a need for ever faster phase-locked loops.  Prof. Brown’s group developed a new class of oscillators based on an efficient NOR-gate interpolator.  Oscillator frequencies as high as 4.6 GHz were achieved in a 0.18 μm CMOS process, with a 3X tuning range and rms jitter values as low as 0.87ps.  The group also experimented with a resonant clock distribution system, the first to use the parasitic wiring and gate capacitance of the clock tree as the resonant capacitance in a monolithic harmonic clock oscillator.  A method for characterizing the affects of circuit data flow on jitter in both standard and resonant clocks was developed, including a method of extracting the jitter contribution caused by data from time-domain and frequency-domain stability measurements.

While designing a commercial microprocessor as a consulting project, Prof. Brown learned that the quartz crystal oscillators typically used as the time-base for digital systems sometimes cost more than the microprocessor they support.  The idea was conceived to develop an all-silicon clock generator that could be integrated right onto the microprocessor, replacing the off-chip crystal and passive devices required to implement a crystal oscillator.  The researchers evaluated a number of options, and settled on a harmonic oscillator with on-chip inductors and capacitors, and extensive compensation circuitry for temperature and voltage variation.  This introduced an entirely new approach to clocking microprocessors.  Instead of starting with a stable lower-frequency clock and scaling it up with a phase-locked loop, they generated a very high frequency clock and divided it down to the desired frequency.  The crystal-derived clock is very clean because of the crystal’s high Q; the harmonic oscillator’s output is not as good in terms of jitter and stability.  But just as noise worsens as the square root of the multiplier in a phase-locked loop, it improves as the square root of the divisor in these circuits, yielding a high quality clock at the desired frequency.  The research involved developing sacrificial under-etching to maximize the on-chip inductor’s Q with no added masks or processing steps, so the oscillator could be fabricated in standard, advanced CMOS processes.  The project included a great deal of theoretical noise analysis, and some correction of commonly accepted theory.  Major contributions included novel analog circuitry to stabilize the frequency over voltage, temperature and device parameters; fast initial tuning techniques; and packaging solutions to avoid humidity sensitivity.  Significant contributions were also made in design methodology for mixed technology (digital, analog, RF and MEMS) systems on chips, and a CAD tool called Newton for MEMS device design has been licensed to a third party.  The resulting all-silicon harmonic oscillator can be integrated onto a microprocessor or other circuit, entirely eliminating the need for a crystal oscillator.  These all-silicon oscillators have the unique characteristic that they reach stability within as little as 20 nS after power is applied, compared to hundreds of mS for a phase-locked-loop to reach stability.  This makes practical fine-grained power cycling to reduce power dissipation, a feature that is particularly valuable for extending battery life in portable or implanted electronics.  They are smaller, lower-power, more robust physically, and lower cost than crystal oscillators or MEMS resonant oscillators. 

Prof. Brown and his student, Michael McCorquodale, founded Mobius Microsystems to commercialize all-silicon harmonic oscillators.  Integrated versions of the oscillators are in volume production on USB interface chips, and discrete versions are being sold as pin-for-pin replacements for motherboard clocks and as bare die to be bonded into a package with the primary IC, forming a system-in-a-package solution that makes the part self-clocked.  The monolithic CMOS harmonic oscillators appear to be a disruptive technology that could have broad impact on the electronics industry.  Top-tier Silicon Valley VCs have invested more than $20M in the company to date.  New applications in a number of product sectors are developing as the frequency accuracy and jitter are continually improved; the latest parts are accurate to within 20 ppm over the commercial temperature and voltage range.  Prof. Brown’s group integrates these clocks onto the embedded microprocessors that they design, and they are exploring new applications for the basic technology, ranging from ultra-wideband radio transmitters to sensors.

Circuit Design: (K. Wu, P. Parakh, C. Gauthier, K. Das, R. Rao, J. Sivagnaname, M. Guthaus, A. Ghosh)

The design of circuits underpins all of the areas addressed by Prof. Brown’s research group, so there is overlap between some of the activities in this and the other sections. 

Prof. Brown’s group and researchers from the GE Corporate Research and Development Center significantly raised the operating temperatures of bulk CMOS circuits by using a thin epi substrate, increasing doping levels, and using refractory metal for interconnect.  They increased 300C latchup holding voltage by 4X and holding current by 30X over an equivalent bulk CMOS process.  High-temperature design rules were developed that assured latchup-free operation at 200C.  A transistor model that accurately represented the space charge at high temperatures (by solving the Poisson's equation and two-carriers' current continuity equations instead of assuming the depletion layer approximation) provided insights into circuit operation at very high temperatures.  For example, it became clear that silicon circuits can never operate at high speeds and high temperatures because, in addition to the mobility degradation, the small-signal capacitance equivalent depletion-layer width becomes very small at high temperatures, significantly increasing the parasitic capacitive load.

While microprocessor clock speeds increased during the 1990s at a rate of about 40% per year, off-chip signaling rates improved more slowly, at about 14% per year.  Concurrently, the number of transistors on chips increased according to Moore’s Law (doubling about every 18 months) but the number of package pins increased at only about 12% per year.  Despite the development of more latency-tolerant architectures (multi-level caches, prefetching, stream buffers, etc.), these effects led to a significant bandwidth bottleneck between processor chips and off-chip memory.  Prof. Brown’s group developed a switched-current transceiver with an active current mirror receiver that achieved Gb/s/pin operation in a 0.5 mm CMOS process (current technology at that time).  This cascoded switched-current signaling architecture was also implemented in CGaAs and compared to Gunning Transceiver Logic, large-buffer voltage signaling, and differential signaling.  The switched-current interface was found to be four times more power efficient than similar source-synchronous interfaces.

Prof. Brown pioneered the use of commercial CAD tools in university courses and research, but when a design automation capability they needed was not available in the commercial tool suites, his group sometimes developed it, always building on top of the best available commercial tools and making the new tools compatible with commercial tool flows.  Examples of such contributions were the tools for high-performance gallium arsenide (GaAs) circuits and multichip modules. They developed circuit design techniques and CAD tools that guaranteed process tolerance in the circuits; SRAM compilers that optimize the design for the desired power-delay product; a tool that optimally places modules on a datapath; an automatic block placement tool that minimizes routing congestion; an area-I/O place and route tool for flip-chip packaging; and software that guides engineers through the cost-benefit analysis for nonlinear process scaling.  On a sabbatical, Prof. Brown worked with Cascade Design Automation to develop a commercial GaAs circuit compiler that incorporated many of these capabilities.  In work that was related to clocking, statistical design, and process parameter variation, his group developed a CMOS clock tree optimizer that correlated both clock and data-path parametric sensitivities to make designs more robust.  A quadratic programming heuristic was introduced that was able to realize this improvement without sacrificing deterministic skew.  The resulting trees have an average improvement of 16.3% in expected skew with the addition of only 2% to clock power.  In a project aimed at making the performance of synthesized circuits approach that of custom circuits, the team developed a logical-effort-based transistor sizing tool, coupled to a cell synthesizer that generated physical, logical and simulation views (years before commercial tools offered this capability), and datapath tiling for wirelength minimization and predictable loads.  The on-the-fly library generator enabled studies of circuit performance vs. library size.  When the group needed embedded benchmark programs that were not readily available, they developed and published the MiBench suite, which is now widely used in industry and academia for benchmarking embedded processor architectures.  According to Google, the original paper has been cited 953 times, and there are more than 22,000 references to it on the internet.  Prof. Brown’s group saw a need for a library of digital and analog circuit modules that university students could use in class and research projects, so they developed the University of Michigan Intellectual Property Source (UMIPS), and populated it with circuits from their own projects.  This resource facilitated collaboration and the reuse of circuits, so that designers could focus on the modules that were unique to their projects.  Users from around the world have tapped this resource.

Working closely with the IBM Research Labs, Prof. Brown and his students developed circuit techniques for partially-depleted (PD) and fully-depleted (FD) Silicon-on-Insulator (SOI) technologies.  Most of this work had a theme of reducing power dissipation at a given circuit speed.  Prof. Brown spent a sabbatical focused on low-power circuits in SOI in the Exploratory VLSI group of the IBM Austin Research Laboratory just before moving to the University of Utah.  Because of SOI’s superior short channel effects and better scalability, devices of the future will implement some form of SOI (planar, Tri-Gate, FinFET).  As semiconductor process dimensions and film thicknesses have been scaled, subthreshold source-drain leakage and gate-source leakage have increased to the point that the leakage power in ICs threatened to exceed dynamic power dissipation.  New gate insulators and other process techniques are important parts of the solution, but good circuit techniques are also critical.  Prof. Brown’s group developed circuits that mitigate the parasitic bipolar effect and timing uncertainty in PD SOI.  They studied and refined multi-threshold CMOS (MTCMOS) for PD SOI, improving the gate delay by as much as 45% and the standby leakage by a factor of eight.  Similar techniques were shown to be effective in dynamic logic, as well.  Design automation tools were developed to guide the design of SOI circuits and implement the new circuit techniques.  An optimal header/footer tapering algorithm was developed for FD SOI; it reduced standby leakage by a factor of 20 over that of conventional MTCMOS.  A dynamic logic scheme for FD SOI circuits was developed that reduces leakage power by a factor of 10 to 30 while speeding up the circuits by 15% over a conventional domino logic scheme.  All of the new techniques were evaluated in terms of their effects on power rail bounce.  Prof. Brown’s group was first to study power-performance trade-offs of SOI circuits taking gate leakage into consideration.  CAD tools for efficiently estimating gate leakage were developed, and efficient methods for determining the lowest-leakage data vectors to be applied to static combinational circuits in standby mode were developed.  Circuit reorganization schemes were developed for both static and dynamic circuits that reduced gate leakage by 75% and total leakage by 40%.  Power dissipation in data buses was reduced through the development of skewed pulse buses, which achieved a 20% reduction in active mode leakage, an order of magnitude reduction in standby leakage, and a delay improvement of 20%.  Leakage was studied as a function of process parameter variation, and a model was developed for determining the optimal supply voltage for parametric yield optimization.  Analog circuits in SOI, such as a body-compensated current mirror that is stable in the presence of gate leakage, and comparators that employ offset cancellation through body biasing, were also designed, fabricated and tested.

In light of the emergence of SOI technologies and effects that have come with aggressive scaling of electronic devices (short channel non-idealities and leakage), Prof. Brown’s group took a fresh look at unipolar logic families, using datapath blocks from their PowerPC-architecture PUMA Processor for realistic evaluations.  They showed that pseudo-nMOS circuits could reduce standby leakage current by a factor of five, and that these circuits could be designed closer to the maximum performance point, since the load bias can be easily adjusted to compensate for process parameter variability.  They also developed two variants of dynamic logic, controlled-load limited switch dynamic logic, and hybrid limited switch dynamic logic, which offer better immunity to noise and charge sharing than basic LSDL.  Wide implementations of CL-LSDL were shown to reduce power by as much as 50% over conventional CL-LSDL circuits, and H-LSDL improved delay by 30% over basic CL-LSDL.  These logic styles are well-suited for high clock rate, high switching activity circuits such as digital signal processors, memory decoders and datapath circuits, and they can be freely mixed with other logic styles.

Among the greatest challenges in modern semiconductor technologies, where the gate oxide is only a few atoms thick and edge roughness of physical features makes a significant difference in transistor dimensions, is the variability of device parameters.  Prof. Brown’s group has developed a technique for detecting parameter variation and compensating for it, so that circuits can be designed for the desired operating point, rather than needing to be over-designed to tolerate large parameter variations.  Other detection schemes are based purely on a representative circuit’s delay; they function properly only if the parameter variations of the p- and n-transistors are shifted in the same direction.  The approach developed in Prof. Brown’s group uses delay, but also considers rise and fall times of signals in the representative circuit, thereby providing independent information on parametric shifts in the NMOS and PMOS transistors.  With this information, the overall circuit speed can be adjusted by tuning the power supply voltage, and the gain for each transistor type can be adjusted independently using substrate bias to drive the operating point back to the desired position.   This detection and compensation approach is in fact a low-power circuit technique because it minimizes the power wasted in designing circuits that will operate with broad parameter variation, and it balances the gain of the p- and n-transistors, forcing the circuit to the most efficient operating point.  This technique for forcing transistors to the optimal operating point may be even more useful in analog circuits than in digital circuits.  The approach has also been successfully employed by Prof. Brown’s group to monitor PMOS devices for negative bias temperature instability and to compensate for this transistor-aging phenomenon.  As in all of the research in Prof. Brown’s group, the circuits are not only designed and simulated, but are also fabricated, tested, and demonstrated in realistic applications.

High Performance Microprocessors: (J. Dykstra, A. Chandna, T. Huff, M. Upton, T. Basso, S. Gold)

The late 1980s and early 1990s were times of exploration of various semiconductor technologies for the fabrication of microprocessors.  With DARPA funding, Prof. Brown’s high-speed circuits group designed three gallium arsenide microprocessors in E/D MESFET technology, three in CMOS, and one in complementary heterostructure-insulated-gate FET technology (CGaAs).  Prof. Brown was a proponent of holistic design and multilevel optimization; the research group’s activities covered many facets of high-performance processor design, including process technology, circuit design, packaging, CAD tools, architecture, and the architecture’s relationship to software compilers.  In 1993, they presented at the International Solid-State Circuits Conference, a MIPS-architecture GaAs microprocessor that operated at speeds as high as 200 MHz with 24W power dissipation.  That clock speed was exceeded only by an ECL processor presented at the same conference, which was clocked at 300 MHz, but dissipated 115W.  Close working relationships developed between this university group and Vitesse Semiconductor, Motorola, MIPS Computer Systems, Cray Computer, Tera Computer, IBM, Green Hills Software, and Cascade Design Automation.  The results of their exploration of very large-scale digital circuits in GaAs influenced technology directions taken by Vitesse and Motorola, and paved the way for Tera Computers to build a GaAs supercomputer. 

Prof. Brown’s group developed a number of MESFET circuits which demonstrated novel ideas at the gate level (e.g., the patented current-mirror memory cell and power-rail logic); module level (e.g., high-speed modified Ling adder); and microarchitecture level (e.g., decoupled superscalar architecture and partially-decoded instruction cache).   They were the first group to implement dynamic circuits in complementary GaAs. They also contributed to advanced packaging technologies for high performance computing (multichip modules, fine-pitch flip- chip gold bonding, and area-array I/O). They optimized the PowerPC microarchitecture for implementation in a small transistor-budget, and demonstrated a radiation-hard CGaAs microprocessor that operated at 86 MHz and 2W.  Prof. Brown’s research group has been seen as one of only a few at universities that has the capability and facilities to prototype modern microprocessors. 

Mixed Signal Microprocessors: (K. Kraver, F. Gebara, R. Senger, E. Marsman, N. Gaskin, B. Redd)

Working with colleagues at Michigan, Prof. Brown brought his sensor and integrated circuit research areas together through the design of the MS-8 mixed-signal microprocessor which served as a single-chip interface instrument for the solid-state chemical and physical sensors that he and others have developed.  The MS-8 included voltage, current and capacitive inputs, an accurate on-chip temperature sensor, an analog multiplexor, bandgap voltage reference, programmable-gain instrumentation amplifier, SD analog-to-digital converter, a complete 8-bit microprocessor, on-chip memory, a 16x16 multiply 40-bit accumulate MAC for signal processing, a variety of counters/timers, and serial and parallel I/O modules.  The microprocessor instruction set and modified Harvard architecture were original to this project and aimed at sensor-interface needs; they included bit test and set instructions, a fast interrupt response with 32 priority levels, and ultra-lite direct memory access.  It was fabricated in a 0.35 mm digital process.

Prof. Brown was one of five faculty members, led by Ken Wise, at the University of Michigan, who wrote the proposal for the Michigan Wireless Integrated Microsystems Engineering Research Center.  This ERC proposal, focused on microsystems for remote environmental sensor and biomedical implant applications, referenced the MS-8 as evidence that the proposers could implement fully integrated systems.  Prof. Brown was the thrust leader for Micropower Circuits in the ERC until he moved to become Dean of Engineering at the University of Utah.  He has continued to be fully involved in the Center, participating in weekly administrative meetings (by video conference), industrial advisory board meetings, retreats, and annual reviews. 

Low power circuits have been a focus of the ERC, since both of its testbeds require operation on battery power.  Three microprocessors have been designed in the WIMS series.  They share a 16-bit RISC architecture with a 3-stage pipeline and windowed register file that was designed from a clean sheet of paper, on-chip memory, a loop cache, several peripheral communication interfaces, and the all-silicon harmonic oscillator described above.  Efficient methods were developed for measuring the energy expended in the execution of each instruction, and a power-aware C compiler that uses this information was developed for the WIMS instruction set architecture by Prof. Scott Mahlke’s group at Michigan; feedback from the compiler studies was used to optimize the architecture. The Gen 1 processor, implemented in a 180 nm CMOS technology, was aimed at remote environmental sensing applications.  It incorporated a full analog front-end that pushed the limits of low-voltage, low-power analog design in advanced digital processes.  The nominal process operating voltage was 1.8 V; to accommodate the voltage change as a single battery cell falls from fully charged to its end-of-life potential, the analog circuits were designed to operate on any voltage between 1.8 V and 900 mV.  Weak inversion biasing was used extensively to reduce the need for voltage headroom, to reduce transistor noise and power, and to increase amplifier gain.  A second-order SD modulator was employed on this chip. When driving a 10 kW, 150 pF load, the opamp achieves a DC gain of 80 dB, a unity gain frequency greater than 1.3 MHz, and a phase margin of 60°; the opamp draws a quiescent current of 128 mA.  The sub-1 V SD modulator is enabled by a dynamically biased pseudo-differential integrator. This integrator supports low-voltage operation by employing the reset-opamp technique, thus avoiding the need for high-swing switches. Correlated double sampling curtails the effects of 1/f noise, a more serious problem in fine-featured processes. 

Gen 2, also implemented in a 180 nm CMOS process, was designed as an implantable cochlear prosthesis controller. In addition to the processor core, memory and peripherals, it includes a digital signal processor block consisting primarily of cascaded 1st, 6th and 4th order infinite impulse response filters that implement the Continuous Interleaved Sampling Algorithm used to drive the electrodes in cochlear prostheses.  To provide the required flexibility for patient fitting, all filter coefficients were made programmable by the processor. This chip included clock gating, the ability to modify the clock speed dynamically, and the ability to employ different clocks in the core and in the DSP.  Prof. Brown’s group took the lead in implementing the cochlear prosthesis testbed, integrating the Gen 2 processor, application software, and chips designed by other WIMS researchers into the demonstration system. 

The Gen 3 processor is being designed in a 65 nm CMOS process to address brain machine interface needs.  It will include the processor, all-silicon clock generator, memory, hardware DSP functionality, an analog front-end customized for neural signals, and an ultra-wideband wireless interface.  This version of the processor adds DMA instructions to efficiently move blocks of data or machine state to and from memory. Test chips implementing most of the modules have been fabricated and tested.  The fully-functional microprocessor core dissipates 350 mW running at 10 MHz or 10 mW running at 100 MHz.

 

Publications

  • Lee WH, Ren H, Wu J, Novak O, Brown RB, Xi C, Meyerhoff ME, "Electrochemically Modulated Nitric Oxide Release From Flexible Silicone Rubber Patch: Antimicrobial Activity For Potential Wound Healing Applications," ACS Biomater Sci Eng., 2016 Sept 12;2(9):1432-1435. Published, 07/25/2016.
  • "Multi-scale analysis of neural activity in humans: implications for micro-scale electrocorticography". Clinical Neurophysiology Journal. Accepted, 06/03/2015.
  • Empirical Model of UWB Large-Scale Signal Fading in Neocortical Research, International Symposium on Circuits and Systems. Submitted, 05/22/2015.
  • "Chemical Sensors", in Reference Module in Materials Science and Materials Engineering: Elsevier Ltd, 2015. Submitted, 05/15/2015.
  • The Impact of Process Scaling on Scratchpad Memory Energy Savings,” Journal of Low Power Electronics Applications, 2014, 4, pp. 231-251. Published, 09/09/2014.
    http://www.mdpi.com/2079-9268/4/3/231
  • O. Novak, B. Redd, and R. B. Brown “A Fully Integrated Power-Efficient SoC with a Wireless UWB Transmitter for Biomedical and Chemical Research," in Proc. International SoC Design Conference (ISOCC), Busan, Korea, November 2013, pp. 107 - 110. Published, 11/2013.
  • Amlan Ghosh, Rahul M. Rao, Jae-Joon Kim, Ching-Te Chuang, Richard B. Brown, "Slew-Rate Monitoring Circuit for On-Chip Process Variation Detection," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume 21, Issue 9, Sept. 2013, pp. 1683-1692. Published, 09/2013.
    http://ieeexplore.ieee.org/xpl/articleDetails.jsp?...
  • Bennion Redd, Spencer Kellis, Nathaniel Gaskin, and Richard B. Brown, "The impact of process scaling on scratchpad memory energy savings," submitted to IEEE Transactions on VLSI. Submitted, 08/25/2013.
  • Amlan Ghosh, Richard B. Brown, Rahul M. Rao, Ching-Te Chuang, "Slew-Rate Monitoring Circuit for On-Chip Process Variation Detection", IEEE Transactions on Very Large Scale Integration Systems Manuscript no. TVLSI-00416-2011.R2. In press, 07/21/2012.
  • Spencer Kellis, Sara Hanrahan, Tyler Davis, Paul A. House, Richard Brown, Bradley Greger, "Decoding Hand Trajectories from Micro-Electrocorticography in Human Patients", (2078), 34th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC'12), San Diego, California, August 29-September 1, 2012, pp. 4091-4094. Accepted, 07/05/2012.
  • Ondrej Novak, Cameron Charles, Richard Brown, “A Fully Integrated 19 pJ/Pulse UWB Transmitter for Biomedical Applications Implemented in 65 nm CMOS Technology,” 2011 IEEE International Conference on Ultra-Wideband (ICUWB), Bologna, Italy, September 14-16, 2011, pp. 72-75. Published, 09/2011.
    http://dx.doi.org/10.1109/ICUWB.2011.6058925
  • Ondrej Novak, Cameron Charles, Richard Brown, “An Area and Power Efficient I-UWB Transmitter for Biomedical Applications Implemented in 65 nm CMOS Technology”, 2011 IEEE Biomedical Circuits & Systems Conference, San Diego, California, November 10-12, 2011, pp. 177-180. (Poster Presentation). Published, 08/24/2011.
    http://dx.doi.org/10.1109/BioCAS.2011.6107756
  • Spencer Kellis, Bradley Greger, Sara Hanrahan, Paul House, Richard Brown, “Platinum Microwire for Subdural Electrocorticography Over Human Neocortex: Millimeter-Scale Spatiotemporal Dynamics,” 2011 Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), Boston, Massachusetts, Aug. 30-Sept. 3, 2011, pp. 4761-4765. Published, 06/09/2011.
    http://dx.doi.org/10.1109/IEMBS.2011.6091179
  • Spencer Kellis, Richard Brown, Bradley Greger, “Sensing Millimeter-Scale Dynamics in Cortical Surface Potentials for Neural Prosthetics”, IEEE Sensors 2011, Limerick, Ireland, October 28-31, 2011, pp. 1823-1826. Published, 06/2011.
    http://dx.doi.org/10.1109/ICSENS.2011.6127165
  • Spencer Kellis, Kai Miller, Kyle Thomson, Richard Brown, Paul House, Bradley Greger, “Decoding Spoken Words Using Local Field Potentials Recorded from the Cortical Surface”, Journal of Neural Engineering, vol. 7, no. 5, Oct. 2010. Published, 10/2010.
    http://dx.doi.org/10.1088/1741-2560/7/5/056007
  • Spencer Kellis, Nathanial Gaskin, Bennion Redd, Eric Marsman, Richard Brown, “Hybrid On-Chip Clocking for Sensor Nodes,” International Symposium on System-on-Chip 2010, Tampere, Finland, Sept. 28-30, 2010, pp. 129-132. Published, 09/2010.
    http://dx.doi.org/10.1109/ISSOC.2010.5625540
  • Spencer Kellis, Kai J. Miller, Kyle Thomson, Richard Brown, Paul House, Bradley Greger, “Classification of Spoken Words Using Surface Local Field Potentials”, 32nd Annual International Conference of the IEEE Engineering in Medicine and Biology Society, Aug. 31-Sept.4, 2010, Buenos Aires, Argentina, pp. 3827-3830. Published, 09/2010.
    http://dx.doi.org/10.1109/IEMBS.2010.5627682
  • Spencer Kellis, Nathaniel Gaskin, Bennion Redd, Jeff Campbell, Richard Brown, “Energy Profile of a Microcontroller for Neural Prosthetic Application”, Proceedings of 2010 IEEE International Symposium on Circuits and Systems (ISCAS), May 29-June 2, 2010, Paris, France, pp. 3841-3844. Published, 06/2010.
    http://dx.doi.org/10.1109/ISCAS.2010.5537715
  • K. Wu, R. B. Brown, H.-H Cheng, “Schottky Barrier Quantum Well Resonant Tunneling Transistor (SBQWRTT), a.k.a. H Transistor”, MBE Taiwan 2010, Taipei, Taiwan, May 24-25, 2010, pp. 31-32. Published, 2010.
  • K. Wu, R. B. Brown, H.-H. Cheng, “Schottky Barrier Quantum Well Resonant Tunneling Transistor (SBQWRTT) a.k.a. H Transistor”, Ultimate Limits of Integration in Semiconductors (ULIS) , Glasgow, Scotland, March 17-19, 2010, pp. 229-232. Published, 2010.
  • A. Ghosh, R. Franklin, R.B. Brown, “Analog Circuit Design Methodologies to Improve Negative-Bias Temperature Instability Degradation”, Proceedings of 23rd International Conference on VLSI Design, Bangalore, India, Jan. 3-7, 2010, pp. 369-374. Published, 01/2010.
    http://dx.doi.org/10.1109/VLSI.Design.2010.69
  • S. Kellis, P. A. House, K. E. Thomson, R. B. Brown, B. E. Greger, “Neuroprosthetic Application of Human Neocortical Electrical Activity Recorded on Nonpenetrating Microwire Arrays,” Society for Neuroscience Annual Meeting, Chicago, IL, October 17-21, 2009, Abstract 216.10. Published, 10/17/2009.
  • Amlan Ghosh, Richard Brown, “Low-Power Operation of Integrated Circuits in the Presence of Process Variation”, 17th IFIP/IEEE International Conference on Very Large Scale Integration(VLSI/SoC), Florianopolis, Brazil, October 15-16, 2009, CD: Ph.D. Forum, paper 11. Published, 10/15/2009.
  • Robert K. Franklin, Segyeong Joo*, Sanddep Negi, Florian Solzbacher, Richard B. Brown, “A Comparison of Fabrication Methods for Iridium Oxide Reference Electrodes”, 2009 IEEE Sensors, Christchurch, New Zealand, Oct. 25-28, 2009, pp. 1086-1089. Published, 10/2009.
    http://dx.doi.org/10.1109/ICSENS.2009.5398565
  • A. Ghosh, R. Rao, R. Brown, “A Centralized Supply Voltage and Local Body Bias-Based Compensation Approach to Mitigate Within-die Process Variation”, Proceedings of the International Symposium on Low Power Electronics and Design 2009, San Francisco, CA, Aug. 19-21, 2009, pp. 45-50. Published, 08/19/2009.
  • Spencer S. Kellis, Paul A. House, Kyle E. Thomson, Richard B. Brown, Bradley E. Greger, “Human Neocortical Electrical Activity Recorded on Nonpenetrating Microwire Arrays: Applicability for Neuro Prosthesis,” Neurosurgical Focus, vol. 27, no. 1, E9, July 2009. Published, 07/2009.
    http://thejns.org/doi/full/10.3171/2009.4.FOCUS097...
  • Richard B. Brown, Environmental Sensors, Report on Micro Nano Systems Horizon 2040 Workshop, Denver CO, June 21, 2009, pp. 1-15. Other, 06/2009.
  • Amlan Ghosh, Rahul Rao, Ching-Te Chuang, Richard Brown, “A Precise Negative Bias Temperature Instability Sensor Using Slew-Rate Monitor Circuitry,” 2009 IEEE International Symposium on Circuits and Systems, Taipei, Taiwan, May 24-27, 2009, pp.381-384. Published, 05/24/2009.
    http://dx.doi.org/10.1109/ISCAS.2009.5117765
  • Michael S. McCorquodale, Gordon A. Carichner, Justin D. O’Day, Scott M. Pernia, Sundus Kubba, Eric D. Marsman, Jonathan J. Kuhn, Richard B. Brown, “A 25-MHz Self-Referenced Solid-State Frequency Source Suitable for XO-Replacement,” IEEE Transactions on Circuits and Systems, vol. 56, no. 5, pp. 943-956, May 2009. Published, 05/2009.
    http://dx.doi.org/10.1109/TCSI.2009.2016133
  • M.S. McCorquodale, R.B. Brown, "On Modern and Historical Short-Term Frequency Stability Metrics for Frequency Sources," IEEE International Frequency Control Symposium, joint with the 22nd European Frequency and Time Forum, Besancon, France, April 2009, pp. 328-333. Published, 04/2009.
    http://dx.doi.org/10.1109/FREQ.2009.5168195
  • S. M. Martin, F. H. Gebara, T. D. Strong, R. B. Brown, “A Fully Differential Potentiostat,” IEEE Sensors Journal, vol. 9, issue 2, pp. 135-142, Feb. 2009. Published, 02/2009.
    http://dx.doi.org/10.1109/JSEN.2008.2011085
  • Spencer Kellis, Richard Brown, “Embedded System to Perform Motor Decode in a Neural Prosthetic Application”, 17th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI/SoC), Florianopolis, Brazil, October 15-16, 2009, CD: Forum Ph.D., paper 2. Published, 2009.
  • Matthew D. Johnson, Robert K. Franklin, Matthew D. Gibson, Richard B. Brown, Daryl R. Kipke, “Implantable Microelectrode Arrays for Simultaneous Electrophysiological and Neurochemical Recordings”, Journal of Neuroscience Methods, vol. 174, issue 1, pp. 62-70, Sept. 2008. Published, 09/2008.
  • M. S. McCorquodale, S. M. Pernia, S. Kubba, G. Carichner, J. O'Day, E. Marsman, J.Kuhn, R. B. Brown, "A 25MHYz All-CMOS Reference Clock Generator for XO-Replacement in Serial Wire Interfaces", IEEE International Symposium on Circuits and Systems, Seattle, WA, May 18-21, 2008, pp. 2837-2840. Published, 05/2008.
    http://dx.doi.org/10.1109/ISCAS.2008.4542048
  • Matthew Guthaus, Dennis Sylvester, Richard Brown, "Clock Tree Synthesis with Data-Path Sensitivity Matching," 13th Asia and South Pacific Design Automation Conference, Seoul, Korea, March 21-24, 2008, pp. 498-503. Published, 03/21/2008.
    http://dx.doi.org/10.1109/ASPDAC.2008.4484001
  • Amlan Ghosh, Rahul M. Rao, Ching-Te Chuang, Richard B. Brown, “On-Chip Process Variation Detection Using Slew-Rate Monitoring Circuit”, 9th International Symposium on Quality Electronic Design, San Jose, CA, March 17-19, 2008, pp. 815-820. Published, 03/2008.
    http://dx.doi.org/10.1109/ISQED.2008.4479843
  • Koushik K. Das, Ching-Te Chuang, Richard B. Brown, "Reducing Parasitic BJT Effects in Partially-Depleted SOI Digital Logic Circuits", Microelectronics Journal, vol. 39, issue 2, pp. 275-285. Published, 02/01/2008.
  • Segyeong Joo, Richard B. Brown, "Chemical Sensors with Integrated Electronics", Chemical Reviews, vol. 208, issue 2, pp. 638-651, Feb. 2008. (Recognized as a "Most-Accessed Article"). Published, 02/01/2008.
  • Michael S. McCorquodale, Scott M. Pernia, Justin D. O‘Day, Gordy Carichner, Eric Marsman, Nam Nguyen, Sundus Kubba, Si Nguyen, Jon Kuhn, Richard B. Brown, “A 0.5-480 MHz Self-Referenced CMOS Clock Generator with 90ppm Total Frequency Error and Spread Spectrum Capability”, International Sold-State Circuits Conference, San Francisco, CA, February 3-7, 2008, vol. 5, pp. 350-619. Published, 02/2008.
    http://dx.doi.org/10.1109/ISSCC.2008.4523201
  • Koushik K. Das, Richard B. Brown, Ching-Te Chuang, "Reducing Parasitic BJT Effects in Partially-Depleted SOI Digital Logic Circuits", Microelectronics Journal, vol. 39, issue 2, pp. 275-285, Feb. 2008. Published, 2008.
  • Amlan Ghosh, Rahul M. Rao, Jae-joon Kim, Ching-Te Chuang, Richard B. Brown, “On-Chip Process Variation Detection Using Slew-Rate Monitoring Circuit”, 21st International Conference on VLSI Design, Hyderabad, India, Jan. 4-8, 2008, pp. 143-149. Published, 01/2008.
    http://dx.doi.org/10.1109/VLSI.2008.67
  • Kanak Agarwal, Rahul Rao, Dennis Sylvester, Richard Brown, "Parametric Yield Analysis and Optimization in Leakage Dominated Technologies", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 15, no. 6, pp. 613-623, June 2007. Published, 06/01/2007.
    http://dx.doi.org/10.1109/TVLSI.2007.898625
  • Michael S. McCorquodale, Scott M. Pernia, Sundus Kubba, Gordy Carichner, Justin O'Day, Eric Marsman, Jon Kyhn, Richard B. Brown, "A 25 MHz All-CMOS Reference Clock Generator for XO-Replacement in Serial Wire Interfaces," 2008 IEEE International Symposium on Circuits and Systems, Seattle WA, May 2008, pp. 2837-2840. Published, 05/2007.
    http://dx.doi.org/10.1109/ISCAS.2008.4542048
  • Michael S. McCorquodale, Justin D. Day, Scott M. Pernia, Gordon A. Carichner, Sundus Kubba, Richard B. Brown, "A Monolithic and Self-Referenced RF LC Clock Generator Compliant with USB 2.0", IEEE Journal of Solid-State Circuits, vol. 42, issue 2, pp. 385-399, Feb. 2007. Published, 02/2007.
    http://dx.doi.org/10.1109/JSSC.2006.883337
  • Robert Franklin, Steven Martin, Timothy D. Strong, Richard Brown, "Chemical and Biological Systems: Chemical Sensing for Liquids" in Comprehensive Microsystems, Yogesh Gianchandani, Osamu Tabata and Hans Zappe (ed.), Oxford: Elsevier Ltd., 2008, vol. 2, pp. 433-462. Published, 2007.
  • Jun Ho Shim, Juneho Kim, Geun Sig Cha, Hakhyun Nam, Ryan J. White, Henry S. White, Richard B. Brown, "Glass Nanopre-Based Ion-Selective Electrodes", Analytical Chemistry, 79(10), pp. 3568-3574, 2007. Published, 2007.
  • Amlan Ghosh, Rahul M. Rao, Richard B. Brown and Ching-Te Chuang, "On-chip Negative Bias Temperature Instability Sensor using Slew Rate Monitoring Circuitry," 9th Annual Austin CAS Conference, Feb. 22, 2008, p. 1-4. Published, 2007.
  • Segyeon Joo, Richard B. Brown, "Chemical Sensors with Integrated Electronics", Chemical Reviews, 2008; 108(2) pp 638 - 651. Published, 2007.
  • Harmander S. Deogun, Robert Senger, Dennis Sylvester, Richard Brown, Kevin Nowka, "A Dual-VDD Boosted Pulsed Bus Technique for Low Power and Low Leakage Operation," International Symposium on Low Power Electronics and Design, San Jose, CA, October 2006, pp. 73-78. Published, 10/2006.
    http://dx.doi.org/10.1109/LPE.2006.4271810
  • M.R. Guthaus, D. Sylvester, R.B. Brown, "Clock Buffer and Wire Sizing Using Sequential Programming," 43rd ACM/IEEE Design Automation Conference, San Francisco, CA, July 2006, pp. 1041-1046. Published, 07/2006.
    http://dx.doi.org/10.1109/DAC.2006.229435
  • Timothy D. Strong, Steven M. Martin, Robert K. Franklin, Richard B. Brown, “Integrated Electrochemical Neurosensors,” Proceedings 2006 IEEE International Symposium on Circuits and Systems, Island of Kos, Greece, May 21-24, 2006, pp. 4110-4113. Published, 05/2006.
    http://dx.doi.org/10.1109/ISCAS.2006.1693533
  • R.M. Senger, E.D. Marsman, G.A. Carichner, S. Kubba, M.S. McCorquodale, R.B. Brown, "Low-latency, HDL-synthesizable Dynamic Clock Frequency Controller with Self-referenced Hybrid Clocking, "Proceedings 2006 IEEE International Symposium on Circuits and Systems, Island of Kos, Greece, May 21-24, 2006, pp. 775-778. Published, 05/2006.
    http://dx.doi.org/10.1109/ISCAS.2006.1692700
  • E.D. Marsman, R.M. Senger, G.A. Carichner, S. Kubba, M.S. McCorquodale, R.B. Brown, "DSP Architecture for Cochlear Implants", Proceedings 2006 IEEE International Symposium on Circuits and Systems, Osland of Kos, Greece, May 21-24, 2006, pp. 657-660. Published, 05/2006.
    http://dx.doi.org/10.1109/ISCAS.2006.1692671
  • Matthew R. Guthaus, Dennis Sylvester, Richard B. Brown, “Process-Induced Skew Reduction in Nominal Zero-Skew Clock Trees,” Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama City, Japan, Jan. 24-27, 2006, pp. 84-89. Published, 01/2006.
    http://dx.doi.org/10.1109/ASPDAC.2006.1594650
  • Jayakamaran Sivagnaname, Hung C. Ngo, Kevin J. Nowka, Robert K. Montoye, Richard B. Brown, “Wide Limited Switch Dynamic Logic Circuit Implementations,” 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems and Design), Hyderabad, India, Jan. 3-7, 2006, pp. 94-99. Published, 01/2006.
    http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arn...
  • Robert M. Senger, Eric D. Marsman, Michael S. McCorquodale, Richard B. Brown, “A 16-Bit, Low-Power Microsystem with Monolithic MEMS-LC Clocking,” Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama City, Japan, Jan. 24-27, 2006, pp. 94-95. Published, 01/2006.
    http://dx.doi.org/10.1109/ASPDAC.2006.1594653
  • Michael S. McCorquodale, James L. McCann, Richard B. Brown, “Newton: A Library-based Analytical Synthesis Tool for RF-MEMS Resonators,” Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama City, Japan, Jan. 24-27, 2006, pp. 279-284. Published, 01/2006.
    http://dx.doi.org/10.1109/ASPDAC.2006.1594695
  • R.M. Senger, E.D. Marsman, M.S. McCorquodale, R.B. Brown, "A 16-bit, Low-power Microsystem with Monolithic MEMS-LC Clocking", Asia and South Pacific Conference on Design Automation, Yokohama City, Japan, January 24-27, 2006, pp. 94-95. Published, 01/2006.
    http://dx.doi.org/10.1109/ASPDAC.2006.1594653
  • M.R. Guthaus, D. Sylvester, R.B. Brown, "Process-induced Skew Reduction in Nominal Zero-skew Clock Trees", Asia and South Pacific Conference on Design Automation, Yokohama City, Japan, January 24-27, 2006, pp. 84-89. Published, 2006.
  • M.S. McCorquodale, J.L. McCann, R.B. Brown, "Newton: A Library-based Analytical Synthesis Tool for RF-MEMS Resonators", Asia and South Pacific Conference on Design Automation, Yokohama City, Japan, January 24-27, 2006, pp. 279-284. Published, 01/2006.
    http://dx.doi.org/10.1109/ASPDAC.2006.1594695
  • J. Sivagnaname, H.C. Ngo, K.J. Nowka, R.K. Montoye, R.B. Brown, "Wide Limited Switch Dynamic Logic Circuit Implementations", 19th International Conference on VLSI Design (held jointly with 5th International Conference on Embedded Systems and Design), Hyderabad, India, January 3-7, 2006, pp. 94-99. Published, 01/2006.
    http://dx.doi.org/10.1109/VLSID.2006.171
  • Steven M. Martin, Fadi H. Gebara, Brian J. Larivee, Richard B. Brown, “A CMOS-Integrated Microin-strument for Trace Detection of Heavy Metals,” IEEE Journal of Solid-State Circuits, vol. 40, issue, 12, pp. 2777-2786, Dec. 2005. Published, 12/2005.
    http://dx.doi.org/10.1109/JSSC.2005.858478
  • R.K. Franklin, M.D. Johnson, K.A. Scott, J.H. Shim, H. Nam, D.R. Kipke, R.B. Brown, “Iridium Oxide Reference Electrodes for Neurochemical Sensing with MEMS Microelectrode Arrays,” Proceedings of the 4th Annual IEEE Conference on Sensors, Irvine, CA, Oct. 31-Nov. 3, 2005, pp. 1400-1403. Published, 11/2005.
    http://dx.doi.org/10.1109/ICSENS.2005.1597971
  • Jeonghan Ha, Steven M. Martin, Youngho Jeon, In Jun Yoon, Richard B. Brown, Hakhyun Nam, Geun Sig Cha, “A Polymeric Junction Membrane for Solid-State Reference Electrodes,” Analytica Chimica Acta., vol. 549, issues 1-2, pp. 59-66, Sept. 6, 2005. (DOI:10.1016/j.aca.2005.06.011). Published, 09/06/2005.
  • M.D. Johnson, R.K. Franklin, K.A. Scott, R.B. Brown, D.R. Kipke, “Neural Probes for Concurrent Detection of Neurochemical and Electrophysiological Signals in Vivo,” Proceedings of the 2005 IEEE Annual Conference of the Engineering in Medicine and Biology Society, Shanghai, China, Sept. 1-4, 2005, pp. 7325-7328. Published, 09/2005.
    http://dx.doi.org/10.1109/IEMBS.2005.1616203
  • Rajiv A. Ravindran, Robert M. Senger, Eric D. Marsman, Ganesh S. Dasika, Matthew R. Guthaus, Scott A. Mahlke, Richard B. Brown, “Partitioning Variables Across Multiple Register Windows to Reduce Spill Code In A Low-Power Processor,” IEEE Transactions on Computers, vol. 54, issue 8, pp. 998-1012, Aug. 2005. Published, 08/2005.
    http://dx.doi.org/10.1109/TC.2005.132
  • Fadi H. Gebara, Jeremy D. Schaub, Alan J. Drake, Kevin I. Nowka, Richard B. Brown, “4.0GHz 0.18µm CMOS PLL Based on an Interpolative Oscillator,” 2005 Symposium on VLSI Circuits, Digest of Technical Papers, Kyoto, Japan, June 16-18, 2005, pp. 100-103. Published, 06/2005.
    http://dx.doi.org/10.1109/VLSIC.2005.1469343
  • Dennis Sylvester, Himanshu Kaul, Kanak Agarwal, Rahul M. Rao, Sani Nassif, Richard B. Brown, “Power-Aware Global Signaling Strategies,” IEEE International Symposium on Circuits and Systems, Kobe, Japan, May 23-26, 2005, vol. 1, pp. 604-607. Published, 05/2005.
    http://dx.doi.org/10.1109/ISCAS.2005.1464660
  • Eric D. Marsman, Robert M. Senger, Michael S. McCorquodale, Matthew R. Guthaus, Rajiv A. Ravindran, Ganesh S. Dasika, Scott A. Mahlke, Richard B. Brown, “A 16-Bit Low-Power Microcontroller with Monolithic MEMS-LC Clocking,” IEEE International Symposium on Circuits and Systems, Kobe, Japan, May 23-26, 2005, vol. 1, pp. 624-627. Published, 05/2005.
    http://dx.doi.org/10.1109/ISCAS.2005.1464665
  • Matthew R. Guthaus, Natesan Venkateswaran, Vladimir Zolotov, Dennis Sylvester, Richard B. Brown, “Optimization Objectives and Models of Variation Models for Statistical Gate Sizing,” Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI 05), Chicago, IL, April 17-19, 2005, pp. 317-322. Published, 04/2005.
  • Jayakumaran Sivagnaname, Hung C. Ngo, Kevin J. Nowka, Robert K. Montoye, Richard B. Brown, “Controlled-Load Limited Switch Dynamic Logic Circuit,” Proceedings of the Sixth International Symposium On Quality Electronic Design (nominated for best paper award), San Jose, CA, March 21-23, 2005, pp. 83-87. Published, 03/2005.
    http://dx.doi.org/10.1109/ISQED.2005.35
  • Rahul Rao, Kanak Agarwal, Anirudh Devgan, Dennis Sylvester, Richard Brown, Kevin Nowka, “Parametric Yield Analysis and Constrained-Based Supply Voltage Optimization,” International Sym-posium On Quality Electronic Design, (nominated for best paper award), San Jose, CA, March 21- 23, 2005, pp. 284-290. Published, 03/2005.
    http://dx.doi.org/10.1109/ISQED.2005.90
  • Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh S. Dasika, Eric D. Marsman, Robert M. Senger, Scott A. Mahlke, Richard B. Brown, “Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache,” Proceedings of the International Symposium on Code Generation and Optimization (CGO 05), San Jose, CA, March 20-23, 2005, pp. 179-190. Published, 03/2005.
    http://dx.doi.org/10.1109/CGO.2005.13
  • Harmander S. Deogun, Rahul M. Rao, Dennis Sylvester, Richard Brown, Kevin Nowka, “Dynamically Pulsed MTCMOS with Bus Encoding for Total Power and Cross Talk Minimization,” International Symposium on Quality Electronic Design, San Jose, CA, March 21-23, 2005, pp. 88-93. Published, 03/2005.
    http://dx.doi.org/10.1109/ISQED.2005.49
  • Steven M. Martin, Fadi H. Gebara, Brian J. Larivee, Richard B. Brown, “A Microsystem for Trace Environmental Monitoring,” 2005 IEEE International Solid State Circuits Conference, Digest of Tech-nical Papers, San Francisco, CA, Feb. 6-10, 2005, vol. 1, pp. 244-596. Published, 02/2005.
    http://dx.doi.org/10.1109/ISSCC.2005.1493960
  • Steven M. Martin, Timothy D. Strong, Richard B. Brown, “Monolithic Liquid Chemical Sensing Sys-tems” in Materials, Integration and Technology for Monolithic Instruments, edited by Jeremy A. Theil, Markus Bhm, Donald S. Gardner, and Travis Blalock (Mater. Res. Soc. Symp. Proc., Warrendale, PA, 2005, vol. 869) pp. 109-118. Published, 2005.
  • F. H. Gebara, S. M. Martin, E. D. Marsman, K. L. Kraver, R. B. Brown, “900mV Programmable Gain Amplifier for Cochlear Implants,” Proceedings of IEEE International Workshop on BioMedical Circuits and Systems, Singapore, Dec. 1-3 2004, pp. S1/3/INV - S1/3/1-4. Published, 12/2004.
    http://dx.doi.org/10.1109/BIOCAS.2004.1454112
  • F. H. Gebara, S. M. Martin, K. Nowka, R. B. Brown, “Accurate Current Mirroring in the Presence of Gate Leakage Current,” Proceedings of the 2004 IEEE International SOI Conference, Charleston, SC, Oct. 4-7, 2004, pp. 117-118. Published, 10/2004.
    http://dx.doi.org/10.1109/SOI.2004.1391581
  • A.J. Drake, K.J. Nowka, T.Y. Nguyen, J.L. Burns, R.B. Brown, “Resonant Clocking Using Distributed Parasitic Capacitance,” IEEE Journal of Solid-State Circuits,” vol. 39, issue 9, pp. 1520-1528, Sept. 2004. Published, 09/2004.
    http://dx.doi.org/10.1109/JSSC.2004.831435
  • R. Rao, K. Agarwal, D. Sylvester, R. Brown, K. Nowka, S. Nassif, “Approaches to Run-Time and Standby Mode Leakage Reduction in Global Buses, ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED‘04), Newport Beach, CA, Aug. 9-11, 2004, pp. 188-193. Published, 08/2004.
    http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arn...
  • S.M. Martin, T. Strong, R.B. Brown, “Design, Implementation, and Verification of a CMOS-Integrated Chemical Sensor System,” Proceedings of 2004 International Conference on MEMS, NANO, and Smart Systems (ICMENS2004), Banff, Alberta, Canada, Aug. 25-27, 2004, pp. 379-385. Published, 08/2004.
    http://dx.doi.org/10.1109/ICMENS.2004.1508980
  • M.S. McCorquodale, R.B. Brown, “Academic and Professional Resources for Student-led Technol-ogy Ventures,” IEEE Antennas and Propagation Magazine,” vol. 46, issue 4, pp. 125-131, Aug. 2004. Other, 08/2004.
    http://dx.doi.org/10.1109/MAP.2004.1374034
  • Michael McCorquodale, Richard B. Brown, “UMIPS: A Semiconductor IP Repository for IC Design Education and Research,” 2004 ASEE Annual Conference & Exposition, Salt Lake City, UT, June 20-23, 2004, CD: session 1332, paper 5, pp. 1-8. Published, 06/2004.
  • Richard B. Brown, Dennis Sylvester, David Blaauw, Michael Flynn, Gordon Carichner, Catharine June, “VLSI Design Curriculum,” 2004 ASEE Annual Conference & Exposition, Salt Lake City, UT, June 20-23, 2004, CD: Session 2632, paper 6, pp. 1-9. Published, 06/2004.
    http://tinyurl.com/3hfol6w
  • S. M. Martin, F. H. Gebara, T. D. Strong, R. B. Brown, “A Low-Voltage, Chemical Sensor Interface for Systems-On-Chip: The Fully-Differential Potentiostat,” Proceedings of the 2004 IEEE International Symposium On Circuits and Systems (ISCAS 2004), Vancouver, Canada, May 23-26, 2004, vol. 4, pp. 892-895. Published, 05/2004.
    http://dx.doi.org/10.1109/ISCAS.2004.1329148
  • Fadi Gebara, Steven Martin, Keith Kraver, Richard B. Brown, “A Body-Driven Offset Cancellation Technique in PD-SOI,” 24th International Conference on Microelectronics (MIEL 2004), Nis, Serbia and Montenegro, May 16-19, 2004, vol. 2, pp. 567-570. Published, 05/2004.
    http://dx.doi.org/10.1109/ICMEL.2004.1314889
  • S. M. Martin, J. Ha, J. W. Kim, T. D. Strong, G.S. Cha, R.B. Brown, “ISE Arrays with Improved Dynamic Response and Lifetime,” Technical Digest of the Solid-State Sensor, Actuator, and Micro-systems Workshop, Hilton Head, SC, June 6-10, 2004, pp. 396-399. Published, 2004.
  • S. M. Martin, N. D. Katopodes, R. B. Brown, “Control of Contaminants by Solid-State Liquid Chemi-cal Sensors,” Proceedings of EM2004 - The 17th ASCE Engineering Mechanics Conference, Newark, DE, (CD- ROM), June 13-16, 2004. Published, 2004.
  • Rahul Rao, Kanak Agarwal, Dennis Sylvester, Richard B. Brown, Kevin Nowka, Sani Nassif, “Approaches to Run-Time and Standby Mode Leakage Reduction in Global Buses,” Austin Confer-ence on Energy-Efficient Design, (ACEED 2004), Austin, TX, March 2-4, 2004. Published, 2004.
  • Jayakumaran Sivagnaname, Richard B. Brown, “Effect of Scaling on Stand-by Current in PD- SOI Pseudo-nMOS Circuits,” Austin Conference on Energy-Efficient Design, (ACEED 2004), Austin, TX, March 2-4, 2004. Published, 2004.
  • S. M. Martin, T. D. Strong, F. H. Gebara, R. B. Brown, “Mixed-Domain Simulation of Step-Functional Voltammetry with an Insoluble Species for Optimization of Chemical Microsystems,” 2004 Nano-technology Conference and Tradeshow (Nanotech 2004), Boston, MA, March 7-11, 2004, pp 207- 210. Published, 2004.
  • Rahul M. Rao, Jeffrey L. Burns, Richard B. Brown, “Analysis and Optimization of Enhanced MTC-MOS Scheme,” Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), Mumbai, India, Jan. 5-9, 2004, pp. 234-239. Published, 01/2004.
    http://dx.doi.org/10.1109/ICVD.2004.1260930
  • A. J. Drake and R.B. Brown, “Performance Impact of Gate-Body Signal Phase on DTMOS Inverters,” Proceedings of the Fifth Annual Austin Center for Advanced Studies Conference, Austin, TX, Feb. 19-20, 2004, pp. 35-38. Published, 2004.
  • R. M. Rao, R.B. Brown, K.J. Nowka, J.L. Burns, “Analysis and Mitigation of CMOS Gate Leakage,” Proceedings of the Fifth Annual Austin Center for Advanced Studies Conference, Austin, TX, Feb. 19-20, 2004, pp. 7-11. Published, 2004.
  • Jayakumaran Sivagnaname, Richard B. Brown, “Effect of Scaling on Stand-by Current in PD- SOI Pseudo-nMOS Circuits,” The 46th IEEE Midwest Symposium on Circuits and Systems, Cairo, Egypt, Dec. 27-30, 2003, vol. 3, pp. 1560-1562. Published, 12/2003.
    http://dx.doi.org/10.1109/MWSCAS.2003.1562595
  • Michael McCorquodale, Mei Kim Ding, Richard B. Brown, “Top-Down and Bottom-Up Approaches to Stable Clock Synthesis,” 10th International Conference on Electronics, Circuits and Systems (ICECS 2003), Sharjah, United Arab Emirates, Dec. 14-17, 2003, vol. 2, pp. 575-578. Published, 12/2003.
  • Rahul M Rao, Frank Liu, Jeffrey L. Burns, Richard B. Brown, “A Heuristic to Determine Low Leakage Sleep State Vectors for CMOS Combinational Circuits,” International Conference on Computer Aided Design (ICCAD‘03), San Jose, CA, Nov. 9-13, 2003, pp. 689-692. Published, 11/2003.
    http://dx.doi.org/10.1109/ICCAD.2003.1257884
  • Koushik Das, Rajiv Joshi, Ching-Te Chuang, Richard Brown, “Noise Consideration and Detailed Comparison of Low Standby Gate/Sub-Threshold Leakage Digital Circuits in Nano- Scale SOI Tech-nology,” IEEE International SOI Conference, Newport Beach, CA, Sept. 29-Oct. 2, 2003, pp. 87-88. Published, 10/2003.
    http://dx.doi.org/10.1109/SOI.2003.1242910
  • Alan J. Drake, Noah Zamdmer, Kevin J. Nowka, Richard B. Brown, “Analysis of the Impact of Gate- Body Signal Phase on DTMOS Inverters in 0.13µm PD-SOI,” IEEE International SOI Conference, Newport Beach, CA, Sept. 29-Oct. 2, 2003, pp. 99-100. Published, 10/2003.
    http://dx.doi.org/10.1109/SOI.2003.1242914
  • Jay Sivagnaname and Richard B. Brown, “Standby Currents in PD-SOI Pseudo-nMOS Circuits,” IEEE International SOI Conference, Newport Beach, CA, Sept. 29-Oct. 2, 2003, pp. 95-96. Published, 10/2003.
    http://dx.doi.org/10.1109/SOI.2003.1242912
  • Koushik Das, Rajiv V. Joshi, Ching-Te Chuang, Peter W. Cook, Richard B. Brown, “New Digital Circuit Techniques for Total Standby Leakage Reduction in Nano-Scale SOI Technology,” European Solid-State Circuits Conference (ESSCIRC 2003), Lisbon, Portugal, Sept. 16-18, 2003, pp. 309-312. Published, 09/2003.
    http://dx.doi.org/10.1109/ESSCIRC.2003.1257134
  • Rahul Rao, Jeffrey Burns, Richard Brown, “Circuit Techniques for Gate and Sub-Threshold Leakage Minimization in Future CMOS Technologies,” European Solid-State Circuits Conference (ESSCIRC 2003), Lisbon, Portugal, Sept.16-18, 2003, pp. 313-316. Published, 09/2003.
    http://dx.doi.org/10.1109/ESSCIRC.2003.1257135
  • Alan J. Drake, Kevin J. Nowka, Tuyet Y. Nguyen, Jeffrey L. Burns, Richard B. Brown, “Resonant Clocking Using Distributed Parasitic Capacitance,” Custom Integrated Circuits Conference (CICC), San Jose, CA, Sept. 21-24, 2003, pp. 647-650. Published, 09/2003.
    http://dx.doi.org/10.1109/CICC.2003.1249479
  • Nam Sung Kim, Trevor Mudge, Richard Brown, “A 2.3 Gb/s Fully Integrated Synthesizable AES Rijndael Core,” Proceedings of the IEEE 2003 Custom Integrated Circuits Conference (CICC), San Jose, CA, Sept. 21-24, 2003, pp. 193-196. Published, 09/2003.
    http://dx.doi.org/10.1109/CICC.2003.1249389
  • Rahul M. Rao, Jeffrey Burns, Anirudh Devgan, Richard B. Brown, “Efficient Techniques for Gate Leakage Estimation,” International Symposium on Low Power Electronics and Design (ISLPED‘03), Seoul, Korea, Aug. 25-27, 2003, pp. 100-103. Published, 08/2003.
    http://dx.doi.org/10.1109/LPE.2003.1231843
  • Koushik Das, Rajiv V. Joshi, Ching-Te Kent Chuang, Peter W. Cook, Richard B. Brown, “New Optimal Design Strategies and Analysis of Ultra-Low Leakage Circuits for Nano-Scale SOI Technology,” International Symposium on Low Power Electronics and Design (ISLPED‘03), Seoul, Korea, Aug. 25-27, 2003, pp. 168-171. Published, 08/2003.
    http://dx.doi.org/10.1109/LPE.2003.1231855
  • Michael S. McCorquodale, Mei Kim Ding, Richard B. Brown, “A CMOS Voltage-to-Frequency Linearizing Preprocessor for Parallel Plate RF MEMS Varactors,” 2003 IEEE MTT-S International Microwave Symposium Digest, Philadelphia, PA, June 8-10, 2003, vol. 1, pp. A21-A24. Published, 07/15/2003.
    http://dx.doi.org/10.1109/MWSYM.2003.1211024
  • Steven M. Martin, Timothy D. Strong, Fadi H. Gebara, Keith L. Kraver, Gerald J. Keeler, Richard B. Brown, “Integrated Microtransducers and Microelectronics for Environmental Monitoring,” Proceed-ings of the 15th Biennial University/Government/Industry Microelectronics Symposium (UGIM 2003), Boise, ID, June 30 - July 2, 2003, pp. 300-303. Published, 07/2003.
    http://dx.doi.org/10.1109/UGIM.2003.1225748
  • Hakhyun Nam, Geun Sig Cha, Timothy D. Strong, Jeongha Ha, Jun Ho Shim, Robert W. Hower, Steven M. Martin, Richard B. Brown, “Micro-Potentiometric Sensors,” Proceedings of the IEEE, vol. 91, issue 6, pp. 870-880, June 2003. Published, 06/2003.
    http://dx.doi.org/10.1109/JPROC.2003.813581
  • Michael S. McCorquodale, Mei Kim Ding, Richard B. Brown, “A CMOS Voltage-to-Frequency Linear-izing Preprocessor for Parallel Plate RF MEMS Varactors,” Radio Frequency Integrated Circuits Symposium, published in IEEE MTT-S International Microwave Symposium Digest, Philadelphia, PA, June 8-10, 2003, vol. 1, A21-A24. Published, 06/2003.
    http://dx.doi.org/10.1109/MWSYM.2003.1211024
  • Robert M. Senger, Eric D. Marsman, Michael S. McCorquodale, Fadi H. Gebara, Keith L. Kraver, Matthew R. Guthaus, Richard B. Brown, “A 16-Bit Mixed-Signal Microsystem with Integrated CMOS- MEMS Clock Reference,” Proceedings of the 40th Design Automation Conference, Anaheim, CA, June 2-6, 2003, pp. 520-525. Published, 06/2003.
    http://dx.doi.org/10.1109/DAC.2003.1219062
  • Michael S. McCorquodale, Richard B. Brown, “Academic and Professional Resources for Student-Led Technology Ventures,” Proceedings of the 2003 American Society for Engineering Education Annual Conference & Exposition, Nashville, TN, June 22-25, 2003, CD: session 1654. Published, 06/2003.
  • Michael S. McCorquodale, Mei Kim Ding, Richard B. Brown, “A CMOS Voltage-to-Frequency Linearizing Preprocessor for Parallel Plate RF MEMS Varactors,” 2003 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, Philadelphia, PA, June 8-10, 2003, pp. 535-538. Published, 06/2003.
    http://dx.doi.org/10.1109/RFIC.2003.1214002
  • Michael S. McCorquodale, Mei Kim Ding, Richard B. Brown, “Study and Simulation of CMOS LC Oscillator Phase Noise and Jitter,” Proceedings of the 2003 International Symposium on Circuits and Systems (ISCAS ‘03), Bangkok, Thailand, May 25- 28, 2003, vol. 1, pp. 665-668. Published, 05/2003.
    http://dx.doi.org/10.1109/ISCAS.2003.1205651
  • Michael S. McCorquodale, Fadi H. Gebara, Keith L. Kraver, Eric D. Marsman, Robert M. Senger, Richard B. Brown, “A Top-Down Microsystems Design Methodology and Associated Challenges,” Designers‘ Forum: Design Automation and Test in Europe Conference and Exhibition (DATE 03), Munich, Germany, March 3-7, 2003, pp. 292-296. Published, 03/2003.
    http://dx.doi.org/10.1109/DATE.2003.1253844
  • Koushik Das, Richard Brown, “Novel Circuit Styles for Minimization of Floating Body Effects in Scaled PD-SOI CMOS,” IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), Tampa, FL, Feb. 20-21, 2003, pp. 29-34. Published, 02/2003.
    http://dx.doi.org/10.1109/ISVLSI.2003.1183350
  • Alan J. Drake, Kevin J. Nowka, Richard B. Brown, “Evaluation of Dynamic-Threshold Logic for Low- Power VLSI Design in 0.13µm PD-SOI,” IFIP International Conference on Very Large Scale Integration (VLSI-SoC), Darmstadt, Germany, Dec. 1-3, 2003, pp. 363-368. Published, 2003.
  • M. S. McCorquodale, E. D. Marsman, R. M. Senger, F. H. Gebara, R. B. Brown, “Microsystem and SoC Design with UMIPS,” IFIP International Conference on Very Large Scale Integration (VLSI-SoC), Darmstadt, Germany, Dec. 1-3, 2003, pp. 324-329. Published, 2003.
  • Rajiv A. Ravindran, Robert M. Senger, Eric D. Marsman, Ganesh S. Dasika, Matthew R. Guthaus, Scott A. Mahlke, Richard B. Brown, “Increasing the Number of Effective Registers in a Low-Power Processor Using a Windowed Register File,” Proceedings International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES‘03), San Jose, CA, Oct. 30 - Nov. 2, 2003, pp 125-136. Published, 2003.
  • Koushik K. Das, Richard B. Brown, “Ultra Low-Leakage Power Strategies for Sub-1 V VLSI: Novel Circuit Styles and Design Methodologies for PD-SOI CMOS Technology,” Proceedings of the 2003 IEEE International Conference on VLSI Design, New Delhi, India, Jan. 4-8, 2003, pp. 291-296. Published, 01/2003.
    http://dx.doi.org/10.1109/ICVD.2003.1183152
  • D. Rickard, R. Berger, E. Chan, B. Clegg, S. Patton, R. Anderson, R. Brown, D. Sylvester, M. Guthaus, H. Deogun, K. J. R. Liu, C. Pandana, N. Chandrachoodan, “BAE SYSTEMS Mission Spe-cific Processor Technology,” 28th Annual Government Microcircuit Applications and Critical Tech-nology (GOMACTech) Conference (GOMAC 2003), Tampa, FL, March 31-April 3, 2003, CD Proceedings 23.1, pp. 1-4. Published, 2003.
  • Steven M. Martin, Robert M. Senger, Eric D. Marsman, Fadi H. Gebara, Michael S. McCorquodale, Keith L. Kraver, Matthew R. Guthaus, and Richard B. Brown, “A Low-Power Microinstrument for Chemical Analysis of Remote Environments,” NASA Symposium on VLSI Design, Coeur d‘Alene, ID, May 28-29, 2003, pp. 1-4. Published, 2003.
  • Koushik Das, Rajiv V. Joshi, Ching-Te Chuang, Peter W. Cook, Richard B. Brown, “New Digital Circuit Techniques for Total Standby Leakage Reduction in Nano-Scale SOI Technology,” European Solid-State Circuits Conference (ESSCIRC 2003), Lisbon, Portugal, Sept. 16-18, 2003, pp. 309-312. Published, 2003.
  • Koushik K. Das, Richard B. Brown, “Novel Ultra Low-Leakage Power Circuit Techniques and Design Algorithms in PD-SOI for Sub-1 V Applications,” Proceedings of the 2002 IEEE International SOI Conference, Williamsburg, VA, Oct. 7-10, 2002, pp. 88-90. Published, 10/2002.
    http://dx.doi.org/10.1109/SOI.2002.1044429
  • Koushik K. Das, Richard B. Brown, “A Novel Sub-1 V High Speed Circuit Design Technique in Par-tially Depleted SOI-CMOS Technology with Ultra Low-Leakage Power,” Proceedings of the 28th European Solid-State Circuits Conference (ESSCIRC 2002), Florence, Italy, Sept. 24-26, 2002, pp. 267-270. Published, 09/2002.
    http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arn...
  • Edward T. Zellers, K. D. Wise, K. Najafi, D. Aslam, R. B. Brown, Q. Y. Cai, J. Driscoll, M. Flynn, J. Giachino, R. Gordenker, M. D. Hsieh, C. T.-C. Nguyen, P. Bergstrom, J. Drelich, C. Friedrich, E. Gamble, M. Kaviany, C. J. Lu, A. Matzger, M. Oborny, S. Pang, J. Potkay, R. Sacks, W.-C. Tian, W. Steinecker, J. Whiting, Q. Zhong, “Determinations of Complex Vapor Mixtures in Ambient Air with a Wireless Microanalytical System: Vision, Progress, and Homeland Security Applications,” Technical Digest of the IEEE Conference on Technologies for Homeland Security, Waltham MA, IEEE, Boston, Nov. 13-14, 2002, pp. 92-95. Published, 2002.
  • Matthew R. Guthaus, Jeffrey S. Ringenberg, Dan Ernst, Todd M. Austin, Trevor Mudge, Richard B. Brown, “MiBench: A Free, Commercially Representative Embedded Benchmark Suite,” IEEE 4th Annual Workshop on Workload Characterization, Austin, TX, Dec. 2, 2001, pp. 3-14. Published, 12/2001.
    http://dx.doi.org/10.1109/WWC.2001.990739
  • Koushik K. Das, Richard B. Brown, “Circuit Style Comparison based on the Variable Voltage Transfer Characteristic and Floating β Ratio Concept of Partially Depleted SOI,” 2001 IEEE International SOI Conference, Durango, CO, Oct. 1-4, 2001, pp. 103-104. Published, 10/2001.
    http://dx.doi.org/10.1109/SOIC.2001.958007
  • Koushik K. Das, Richard B. Brown, “Analysis of the Floating Voltage Transfer Characteristic and Comparison of Circuit Styles in Partially Depleted SOI-CMOS,” 27th European Solid-State Circuits Conference (ESSCIRC 2001), Villach, Austria, Sept. 18-20, 2001, pp. 373-376. Published, 09/2001.
    http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arn...
  • Claude Gauthier, Jay Sivagnaname, Richard B. Brown, “Dynamic Receiver Biasing for Inter- Chip Communication,” 2001 Conference on Advanced Research in VLSI (ARVLSI), Salt Lake City, UT, May 14-16, 2001, pp. 101-111. Published, 05/2001.
    http://dx.doi.org/10.1109/ARVLSI.2001.915554
  • Keith L. Kraver, Matthew R. Guthaus, Timothy D. Strong, Peter L. Bird, Geun Sig Cha, Wolfgang Hoeld, Richard B. Brown, “A Mixed-Signal Sensor Interface Microinstrument,” Sensors & Actuators A: Physical, 91, pp. 266-277, 2001. Published, 2001.
  • Timothy D. Strong, Hal C. Cantor, Richard B. Brown, “A Microelectrode Array for Real-Time Neu-rochemical and Neuroelectrical Recording in Vitro,” Sensors & Actuators A: Physical, 91, 357-362, 2001. Published, 2001.
  • K. D. Wise, K. Najafi, D. M. Aslam, R. B. Brown, J. M. Giachino, L. C. McAfee, C. T.-C. Nguyen, R. O. Warrington, E. T. Zellers, “Wireless Integrated MicroSystems (WIMS): The Coming Revolution in the Remote Gathering of Information,” Technical Digest for SensorsExpo Conference, Chicago, IL, June 2001, pp. 175-182. Published, 2001.
  • Koushik K. Das, Richard B. Brown, “Evaluation of Circuit Approaches in Partially Depleted SOI- CMOS,” 2000 IEEE International SOI Conference, Wakefield, MA, Oct. 2- 5, 2000, pp. 98-99. Published, 10/2000.
    http://dx.doi.org/10.1109/SOI.2000.892788
  • Richard B. Brown, Ronald J. Lomax, Gordon Carichner, Alan J. Drake, “A Microprocessor Design Project in an Introductory VLSI Course,” IEEE Transactions on Education, vol. 43, issue 3, pp. 353- 361, August 2000. Published, 08/2000.
    http://dx.doi.org/10.1109/13.865214
  • C. R. Gauthier, R. Brown, “Active Current Mirror Receiver,” 43rd IEEE Midwest Symposium on Circuits and Systems, East Lansing, MI, Aug. 8-11, 2000, vol. 2, pp. 706-709. Published, 08/2000.
    http://dx.doi.org/10.1109/MWSCAS.2000.952854
  • Alan J. Drake, Todd D. Basso, Spencer M. Gold, Keith L. Kraver, Phiroze N. Parakh, Claude R. Gauthier, P. Sean Stetson, Richard B. Brown, “CGaAs PowerPC FXU,” 37th Design Automation Conference, Los Angeles, CA, June 5-9, 2000, pp. 730-735. Published, 06/2000.
    http://dx.doi.org/10.1109/DAC.2000.855411
  • Hyo Jung Yoon, Jae Ho Shin, Sung Dong Lee, Hakhyun Nam, Geun Sig Cha, Timothy D. Strong, Richard B. Brown, “Solid-State Ion Sensors with a Liquid Junction-Free Polymer Membrane-Based Reference Electrode for Blood Analysis,” Sensors and Actuators B: Chemical, 64, 8-14, 2000. Published, 2000.
  • Keith L. Kraver, Matthew R. Guthaus, Timothy D. Strong, Peter L. Bird, Geun Sig Cha, Wolfgang Hoeld, Richard B. Brown, “A Mixed-Signal Sensor Interface Microinstrument, Technical Digest: Solid-State Sensor and Actuator Workshop, Hilton Head, SC, June 4-8, 2000, pp. 14-17. Published, 2000.
  • Timothy D. Strong, Hal C. Cantor, Richard B. Brown, “A Microelectrode Array for Real-time Neuro-chemical and Neuroelectrical Recording In Vitro,” Technical Digest: Solid-State Sensor and Actuator Workshop, Hilton Head, SC, June 4-8, 2000, pp. 29-32. Published, 2000.
  • Koushik K. Das, Richard B. Brown, “Evaluation of Circuit Design Approaches in Partially Depleted SOI-CMOS Using a 32-bit PowerPC Design Vehicle,” TechCon 2000, Sept. 21-23, 2000. Published, 2000.
  • D. Van Campenhout, H. Al-Asaad, J. P. Hayes, T. Mudge, R. Brown, “High-Level Design Verification of Microprocessors via Error Modeling,” ACM Transactions on Design Automation of Electronic Systems, 3(4), pp. 581-599, October 1998. Published, 10/1999.
  • Oliver Lutze, Ravi K. Meruva, Aaron Frielich, Narayanan Ramamurthy, Richard B. Brown, Robert Hower, Mark E. Meyerhoff, “Stabilized Potentiometric Solid-State Polyion Sensors Using Silver- Calixarene Complexes as Additives Within Ion-Exchanger-Based Polymeric Films,” Fresenius‘ Journal of Analytical Chemistry, 364 (1/2):41-47, May, 1999. Published, 05/1999.
  • Spencer M. Gold, Bruce Bernhardt, Richard B. Brown, “A Quantitative Approach to Nonlinear Process Design Rule Scaling [VLSI],” Proceedings of Advanced Research in VLSI, Atlanta, GA, March 21-24, 1999, pp. 99-112. Published, 03/1999.
    http://dx.doi.org/10.1109/ARVLSI.1999.756041
  • Jun Yoon, Dong Kwon Lee, Hakhyun Nam, Geun Sig Cha, Timothy D. Strong, Richard B. Brown, “Ion Sensors Using One-Component Room Temperature Vulcanizing-Type Silicone Rubber Matrices,” Journal of Electroanalytical Chemistry, vol. 464, pp. 135-142, 1999. Published, 1999.
  • Hyo Jung Yoon, Jae Ho Shin, Hakhyun Nam, Geun Sig Cha, Timothy D. Strong, Richard B. Brown, “Solid-State Ion Sensors with a Junction-Free Solvent-Processible Polymer Membrane-Based Ref-erence Electrode for Blood Analysis,” 10th International Conference on Solid- State Sensors and Actuators, Transducers ‘99, Sendai, Japan, June 7-10, 1999, pp. 652-655. Published, 1999.
  • Phiroze Parakh, Richard B. Brown, “Crosstalk Constrained Global Route Embedding,” International Symposium on Physical Design, April 12-14, 1999, pp. 201-206. Published, 1999.
  • P. Parakh, R. B. Brown, K. Sakallah, “Congestion Driven Quadratic Placement,” 35th Design Auto-mation Conference, San Francisco, CA, June 15-19, 1998, pp. 275-278. Published, 06/1998.
    http://dx.doi.org/10.1109/DAC.1998.136540
  • R. Brown, B. Bernhardt, M. LaMacchia, J. Abrokwah, P. Parakh, T. Basso, S. Gold, S. Stetson, C. Gauthier, D. Foster, B. Crawforth, T. McQuire, K. Sakallah, R. Lomax, T. Mudge, “Overview of Com-plementary GaAs Technology for High-Speed VLSI Systems,” Invited Paper, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 6, issue 1, pp. 47-51, March 1998. Published, 03/1998.
    http://dx.doi.org/10.1109/92.661245
  • Richard B. Brown, “Solid-State Liquid Chemical Sensors,” Invited Paper, Chemistry Forum ‘98: The Forth International Symposium, Warsaw, Poland, April 27-29, 1998, pp. 120-126. Published, 1998.
  • T. Basso, R. Brown, “A Complementary GaAs Microprocessor for Space Applications,” The Second International Conference on Integrated Micro-Nanotechnology for Space Applications, Nov. 1- 3,1998, CDROM 98p25a.pdf. Published, 1998.
  • Michael Kelley, Matthew Postiff, Timothy Strong, Richard B. Brown, Trevor N. Mudge, “A Com-plementary GaAs (CGaAsTM) 32-bit Multiply Accumulate Unit,” Invited Paper, 31st Asilomar Confer-ence on Signals, Systems, and Computers, Nov. 2-5, 1997, pp. 1507-1511. Published, 11/1997.
    http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arn...
  • O. A. Olukotun, T. N. Mudge, R. B. Brown, “Multilevel Optimization of Pipelined Caches,” IEEE Transactions on Computers, vol. 46, issue 10, pp. 1093-1102, October 1997. Published, 10/1997.
    http://dx.doi.org/10.1109/12.628394
  • Theresa M. Ambrose, Robert W. Hower, Richard B. Brown, Mark E. Meyerhoff, “Development of a Solid-State Potentiometric Heparin Sensing Cartridge Based on Photocrosslinked Decyl Methacry-late,” Transducers ‘97, Chicago, IL, June 16-19, 1997, pp. 1363-1366. Published, 06/1997.
    http://dx.doi.org/10.1109/SENSOR.1997.635490
  • Ray Farbarik, Xiaowen Liu, Richard B. Brown, Phiroze Parakh, Todd Basso, “CAD Tools for Area Distributed I/O Pad Packaging,” IEEE Multi-Chip Module Conference, Santa Cruz, CA, Feb. 4-5, 1997, pp. 125-129. Published, 02/1997.
    http://dx.doi.org/10.1109/MCMC.1997.569356
  • Ronald J. Lomax, Richard B. Brown, Mini Nanua, Tim D. Strong, “Area I/O Flip-Chip Packaging to Minimize Interconnect,” IEEE Multi-Chip Module Conference, Santa Cruz, CA, Feb. 4-5, 1997, pp. 2-7. Published, 02/1997.
    http://dx.doi.org/10.1109/MCMC.1997.569337
  • M. E. Poplawski, R. B. Brown, K. L Rho, S. Y. Yun, H. J. Lee, G. S. Cha, K.-J. Paeng, “One-Com-ponent Room Temperature Vulcanizing-Type Silicone Rubber-Based Sodium-Selective Membrane Electrodes,” Analytica Chimica Acta, 355, pp. 249-257, 1997. Published, 1997.
  • H. Al-Asaad, J. P. Hayes, T. Mudge, and R. B. Brown, “High-Level Design Verification of Micro-processors via Error Modeling,” Digest IEEE International High Level Design Validation and Test Workshop, Oakland CA, Nov. 14-15, 1997, pp. 194-201. Published, 1997.
  • P. Stetson, R. Brown, “A Complementary GaAs PLL Clock Multiplier with Wide-Bandwidth and Low- Voltage Operation,” 18th Annual IEEE GaAs IC Symposium: Technical Digest 1996, Orlando, FL, Nov. 3-6, 1996, pp. 317-320. Published, 11/1996.
    http://dx.doi.org/10.1109/GAAS.1996.567898
  • R. Brown, T. Basso, P. Parakh, S. Gold, C. Gauthier, R. Lomax, T. Mudge, “Complementary GaAs Technology for a GHz Microprocessor,” invited paper, 18th Annual IEEE GaAs IC Symposium: Technical Digest 1996, Orlando, FL, Nov. 3-6, 1996, pp. 313-316. Published, 11/1996.
    http://dx.doi.org/10.1109/GAAS.1996.567897
  • M. A. Riepe, J. P. Silva, K. Sakallah, R. B. Brown, “Ravel-XL: A Hardware Accelerator for Assigned- Delay Compiled-Code Logic Gate Simulation,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 4, issue 1, pp. 113-129, March 1996. Published, 03/1996.
    http://dx.doi.org/10.1109/92.486085
  • R. W. Hower, J. H. Sin, G. S. Cha, R. K. Meruva, M. E. Meyerhoff, R. B. Brown, “New Solvent Sys-tem for the Improved Electrochemical Performance of Screen-Printed Polyurethane Membrane-Based Solid-State Sensors,” Sensors and Actuators B: Chemical, vol. SNB033/1-3, pp. 168- 172, 1996. Published, 1996.
  • Dong Liu, Ravi K. Meruva, Richard B. Brown, Mark E. Meyerhoff, “Enhancing EMF Stability of Solid- State Ion-Selective Sensors by Incorporating Lipophilic Silver-Ligand Complexes within Polymeric Films,” Analytica Chimica Acta, 321, pp. 173-183, 1996. Published, 1996.
  • D. S. Sakong, M. J. Cha, J. H. Shin, G. S. Cha, M. S. Ryu, R. W. Hower, R. B. Brown, “Asymmetric Membrane-Based Potentiometric Solid-State Ion Sensors,” Sensors and Actuators B: Chemical, vol. 32, pp. 161-166, 1996. Published, 1996.
  • E. Malinowska, V. Oklejas, R. W. Hower, R. B. Brown, M. E. Meyerhoff, “Enhanced Electrochemical Performance of Solid-State Ion Sensors Based on Silicone Rubber Membranes,” Sensors and Actu-ators: B Chemical, vol. 33, pp. 161-167, 1996. Published, 1996.
  • R. Brown, J. Hayes, T. Mudge, “Rapid prototyping & evaluation of high-performance computers,” Proc. Conf. Experimental Research in Computer Systems, NSF Experimental Systems, Ed. L. Snyder, Washington DC, June 1996, pp. 159-168. Published, 1996.
  • R. W. Hower, R. B. Brown, E. Malinowska, R. K. Meruva, M. E. Meyerhoff, “Study of Screen Printed Wells in Solid-State Ion Sensor Electrodes,” Technical Digest: Solid-State Sensor and Actuator Workshop, Hilton Head, SC, June 2-6, 1996, pp. 132-135. Published, 1996.
  • Ajay Chandna, Richard B. Brown, David Putti, C. David Kibler, “Power Rail Logic: A Low Power Logic Style for Digital GaAs Circuits,” IEEE Journal of Solid-State Circuits, vol. 30, issue 10, pp. 1096-1100, Oct. 1995. Published, 10/1995.
    http://dx.doi.org/10.1109/4.466073
  • Muh-Ling Ger, Richard B. Brown, “Sputtered WSix for Micromechanical Structures,” Journal of Mate-rials Research, vol. 10, no. 7, pp. 1710-1720, July 1995. Published, 07/1995.
  • E. Malinowska, V. Oklejas, R. W. Hower, R. B. Brown, M. E. Meyerhoff, “Enhanced Electrochemical Performance of Solid-State Ion Sensors Based on Silicone Rubber Membranes,” Proceedings of Transducers‘95, Eurosensors IX, Stockholm, Sweden, June 25-29, 1995, pp. 851-854. Published, 06/1995.
    http://dx.doi.org/10.1109/SENSOR.1995.717366
  • R. K. Meruva, E. Malinowska, R. W. Hower, R. B. Brown, M. E. Meyerhoff, “Improved EMF Stability of Solid-State Ion-Selective Sensors By Incorporation of Lipophilic Silver- Calix[4] Arene Complexes Within Polymeric Films,” Proceedings of Transducers‘95, Eurosensors IX, Stockholm, Sweden, June 25-29, 1995, pp. 855-858. Published, 06/1995.
    http://dx.doi.org/10.1109/SENSOR.1995.717367
  • R. W. Hower, J. H. Shin, G. S. Cha, R. K. Meruva, M. E. Meyerhoff, R. B. Brown, “New Solvent Sys-tem for the Improved Electrochemical Performance of Screen-Printed Polyurethane Membrane- Based Solid-State Sensors,” Proc. of Transducers‘95, Eurosensors IX, Stockholm, Sweden, June 25-29, 1995, pp. 859-862. Published, 06/1995.
    http://dx.doi.org/10.1109/SENSOR.1995.717368
  • R. K. Meruva, D. Liu, R. B. Brown, M. E. Meyerhoff, “Enhancing Stability of Solid-State Ion- Selective Electrodes by Incorporation of Lipophilic Silver Complexes in Polymeric Films,” 1995 Pittsburgh Conference (Pittcon ‘95), New Orleans, LA, March 5-10, 1995, no. 1083. Published, 1995.
  • A. Chandna, C. D. Kibler, R. B. Brown, M. Roberts, K. Sakallah, “The Aurora RAM Compiler,” Proc. of the 32nd Design Automation Conference, San Francisco, CA, June 12- 16, 1995, pp. 261-266. Published, 1995.
  • A. J. Chandna, R. B. Brown, “An Asynchronous GaAs MESFET Static RAM Using A New Current Mirror Memory Cell,” IEEE Journal of Solid-State Circuits, vol. 29, issue 10, pp. 1270-1276, Oct. 1994. Published, 10/1994.
    http://dx.doi.org/10.1109/4.315214
  • A. Chandna, R. B. Brown, D. Putti, C. D. Kibler, “Power Rail Logic: A Low Power Logic Style for Dig-ital GaAs Circuits,” 16th Annual IEEE GaAs IC Symposium: Technical Digest 1994, Oct. 16-19, 1994, pp. 71-74. Published, 10/1994.
    http://dx.doi.org/10.1109/GAAS.1994.636925
  • P. Sherhart, M. Upton, R. Lomax, R. Brown, “A Variable-Voltage Bidirectional I/O Pad for Digital GaAs Applications,” 16th Annual IEEE GaAs IC Symposium: Technical Digest 1994, Oct. 16-19, 1994, pp. 67-70. Published, 10/1994.
    http://dx.doi.org/10.1109/GAAS.1994.636923
  • D. Nagle, R. Uhlig, T. Stanley, T. Mudge, S. Sechrest, R. Brown, “Design Tradeoffs for Software- Managed TLBs,” ACM Transactions on Computer Systems, vol. 12, no. 3, pp. 175-205, Aug. 1994. Published, 08/1994.
  • K. S. Lee, J. H. Shin, M. J. Cha, G. S. Cha, M. Trojanowicz, D. Liu, H. D. Goldberg, R. W. Hower, R. B. Brown, “Multiionophore-Based Solid-State Potentiometric Ion Sensor as a Cation Detector for Ion Chromatography,” Sensors and Actuators B, vol. 20, pp. 239-246, 1994. Published, 1994.
  • H. D. Goldberg, R. B. Brown, D. Liu, M. Meyerhoff, “Screen Printing: A Technology for the Batch Fabrication of Integrated Chemical-Sensor Arrays,” Sensors and Actuators B: Chemical, 21, pp. 171-183, 1994. Published, 1994.
  • M. E. Poplawski, R. W. Hower, R. B. Brown, “A Simple Packaging Process for Chemical Sensors,” Technical Digest: Solid-State Sensor and Actuator Workshop, Hilton Head, SC, June 13-16, 1994, pp. 25-28. Published, 1994.
  • M. S. Ryu, J. H. Shin, G. S. Cha, R. W. Hower, R. B. Brown, “Polymer Membrane Matrices for Fabri-cating Potentiometric Ion Sensors,” The Fifth International Meeting on Chemical Sensors, Rome, Italy, July 11-14, 1994, pp. 961-964. Published, 1994.
  • D. Liu, H. D. Goldberg, R. W. Hower, R. B. Brown, M. E. Meyerhoff, “Optimizing Screen- Printed, Microfabricated, Potentiometric Solid-State Ion/biosensor Arrays,” 1994 Pittsburgh Conference (Pit-tcon‘94), Feb. 1994, no. 502. Published, 1994.
  • M. E. Poplawski, A. R. Midgley, R. B. Brown, “Batch Fabricated Amperometric Biosensors,” Biosen-sors 94, The Third World Congress on Biosensors: Abstracts, New Orleans, LA, June 1-3, 1994. Published, 1994.
  • M. Upton, T. Huff, T. Mudge, R. Brown, “Resource Allocation in a High Clock Rate Microprocessor,” Sixth International Conference on Architectural Support for Programming Languages and Operating Systems, San Jose, CA, Oct. 4-7, 1994, pp. 98-109. Published, 1994.
  • T. Stanley, M. Upton, P. Sherhart, T. Mudge, R. Brown, “A Microarchitectural Performance Evaluation of a 3.2 Gbyte/s Microprocessor Bus,” MICRO-26, 26th Annual ACM/IEEE International Symposium on Microarchitecture, Austin, TX, Dec. 1-3, 1993, pp. 31-40. Published, 12/1993.
    http://dx.doi.org/10.1109/MICRO.1993.282759
  • R. Brown, M. Upton, A. Chandna, T. Huff, T. Mudge, R. Oettel, “Gallium-Arsenide Process Evaluation Based on a RISC Microprocessor Example,” IEEE Journal of Solid-State Circuits, vol. 28, issue 10, pp. 1030-1037, Oct. 1993. Published, 10/1993.
    http://dx.doi.org/10.1109/4.237518
  • Michael A. Riepe, João Marques Silva, Karem A. Sakallah, Richard B. Brown, “Ravel-XL: A Hardware Accelerator for Assigned-Delay Compiled-Code Logic Gate Simulation,” International Conference. on Computer Design, Oct. 3-6, 1993, pp. 361-364. Published, 10/1993.
    http://dx.doi.org/10.1109/ICCD.1993.393352
  • V. Yang, S.-C. Ma, D. Liu, R. Brown, M. Meyerhoff, “A Novel Electrochemical Heparin Sensor,” ASAIO (American Society for Artificial Internal Organs) Journal, vol. 39, no. 3, pp. M195-M201, July- Sept. 1993. Published, 09/1993.
  • T. Huff, M. Upton, P. Sherhart, P. Barker, R. McVay, T. Stanley, R. Brown, R. Lomax, T. Mudge, K. Sakallah, “A High Performance GaAs Microprocessor,” Proceedings of the IEEE Laser and Optics Society Sarnoff Symposium, Princeton, NJ, March 1993, pp. 166-172. Published, 03/1993.
    http://dx.doi.org/10.1109/SARNOF.1993.657973
  • Dong Liu, Mark E. Meyerhoff, Howard D. Goldberg, Richard B. Brown, “Potentiometric Ion- and Bio-Selective Electrodes Based on Asymmetric Polyurethane Membranes,” Analytica Chimica Acta, vol. 274, pp. 37-46, 1993. Published, 1993.
  • K. S. Lee, J. H. Shin, M. J. Cha, G. S. Cha, M. Trojanowicz, D. Liu, H. D. Goldberg, R. W. Hower, R. B. Brown, “Multiionophore-Based Solid-State Potentiometric Ion Sensor as a Cation Detector for Ion Chromatography,” 7th International Conference on Solid-State Sensors and Actuators (Transducers ‘93), Yokohama, Japan, June 7-10, 1993, pp. 378-381. Published, 1993.
  • R. Uhlig, D. Nagle, T. Stanley, T. Mudge, S. Sechrest, R. Brown, “Design Tradeoffs for Software- Managed TLBs,” Proc. of the 20th Ann. Int. Symposium on Computer Architecture (ISCA), San Diego, CA, May 16-19, 1993, pp. 27-38. Published, 1993.
  • T. Huff, M. Upton, T. Mudge, R. Brown, “The Aurora Project,” Record of Hot Chips V, Stanford CA, Aug. 8-10, 1993, pp. 3.2.1-3.2.12. Published, 1993.
  • M. Upton, T. Huff, P. Sherhart, P. Barker, R. McVay, T. Stanley, R. Brown, R. Lomax, T. Mudge, K. Sakallah, “A 160,000 transistor GaAs microprocessor,” International Solid-State Circuits Conference Digest Technical Papers, Feb. 1993, vol. 36, pp. 92-94. Published, 1993.
  • A. Chandna, R. B. Brown, `”A 32kb GaAs SRAM with Electronically Programmable Redundancy,” Proceedings of the 1993 Symposium, Research on Integrated Systems, MIT Press, edited by Gaetano Borriello and Carl Ebeling, Seattle, WA, 1993, March 14-16, pp. 155-167. Published, 1993.
  • A. Chandna, R. B. Brown, “An Asynchronous GaAs MESFET Static RAM Using a New Current Mirror Memory Cell,” 1993 GaAs IC Symposium, Oct. 10-13, 1993, pp. 79-82. Published, 1993.
  • J. C. Toole, R. B. Brown, “GaAs Opportunities in High Performance Computing and Com-munications,” Keynote address delivered by R. B. Brown, 1993 GaAs IC Symposium, Oct. 10-13, 1993, pp. 3-6. Published, 1993.
  • R. Brown, P. Barker, A. Chandna, T. Huff, R. Lomax, T. Mudge, K. Sakallah, P.J. Sherhart, R. Uhlig, M. Upton, “GaAs RISC Processors,” Invited paper, GaAs IC Symposium Technical Digest, Miami Beach, FL, Oct. 4-7, 1992, pp. 81-84. Published, 10/1992.
    http://dx.doi.org/10.1109/GAAS.1992.247218
  • Richard B. Brown, “Incorporating Computer-Aided Design into an Electrical Engineering/ Computer Science Curriculum,” IEEE Transactions on Education, vol. 35, issue 3, pp. 182-189, Aug. 1992. Published, 08/1992.
    http://dx.doi.org/10.1109/13.144641
  • H. D. Goldberg, D. P. Liu, R. W. Hower, M. E. Poplawski, R. B. Brown,” Screen Printing: A Technol-ogy for Partitioning Integrated Microsensor Processing,” Technical Digest, IEEE Solid-State Sensor and Actuator Workshop, Hilton Head, SC, June 22-25, 1992, pp. 140-143. Published, 06/1992.
    http://dx.doi.org/10.1109/SOLSEN.1992.228306
  • A. I. Kayssi, K. A. Sakallah, R. B. Brown, R. J. Lomax, T. N. Mudge, T. R. Huff, “Impact of MCMs on system performance optimization,” Proceedings of the 1992 IEEE International Symposium on Circuits and Systems, vol. 2, San Diego, CA, May 1992, pp. 919-922. Published, 05/1992.
    http://dx.doi.org/10.1109/ISCAS.1992.230071
  • Muh-Ling Ger, Richard B. Brown, “Characterization of Sputtered Tungsten Silicide as a Microme-chanical Material,” Abstracts of the Materials Research Society Spring Meeting, San Francisco, CA, April 27-31, 1992. Published, 1992.
  • O. A. Olukotun, T. N. Mudge, R. B. Brown, “Performance optimization of pipelined primary caches,” Proc. of the 19th International Symposium on Computer Architecture, May 19-21, 1992, pp. 181- 190. Published, 1992.
  • R. Brown, A. Chandna, T. Huff, R. Lomax, T. Mudge, R. Oettel, M. Upton, “Compound Semiconduc-tor Device Requirements for VLSI,” Invited paper, Gallium Arsenide and Related Compounds 1992, Institute of Physics Conference Series no. 129, Institute of Physics Publishing, Bristol, UK, Karuizawa, Japan, Sep. 28-Oct. 2, 1992, pp. 857-862. Published, 1992.
  • Dong Liu, Howard Goldberg, Richard Brown, Mark Meyerhoff, “Potentiometric Solid-State Ion/Bio-sensors Based on Asymmetric Polyurethane Membranes,” 19th Annual FAACS Meeting Digest of Technical Abstracts, Philadelphia, PA, Sept. 20, 1992, no. 43, pp. 115. Published, 1992.
  • R. Brown, A. Chandna, T. Hoy, T. Huff, R. Lomax, T. Mudge, D. Nagle, K. Sakallah, R. Uhlig, M. Upton, “Synthesis and Verification of a GaAs Microprocessor from a Verilog Hardware Description,” Proc. Open Verilog Int. User Group Meeting, Mar. 1992, pp. 85-92. Published, 1992.
  • G. S. Cha, D. Liu, M. E. Meyerhoff, H. C. Cantor, A. R. Midgley, H. D. Goldberg, R. B. Brown, “Electrochemical Performance, Biocompatibility, and Adhesion of New Polymer Matrices for Solid- State Ion Sensors,” Analytical Chemistry, vol. 63(17), pp. 1666-1672, Sept. 1991. Published, 09/1991.
  • H. D. Goldberg, G. S. Cha, D. Liu, Me. E. Meyerhoff, R. B. Brown, “Improved Stability at the Poly-meric Membrane/Solid-Contact Interface of Solid-State Potentiometric Ion Sensors,” Proceedings of the 6th International Conference on Solid-State Sensors and Actuators (Transducers ‘91), San Francisco, CA, June 24-28, 1991, pp. 781-784. Published, 06/1991.
    http://dx.doi.org/10.1109/SENSOR.1991.148999
  • O. A. Olukotun, R. B. Brown, R. J. Lomax, T. N. Mudge, K. A. Sakallah, “Multilevel Optimization in the Design of a High-Performance GaAs Microcomputer,” IEEE Journal of Solid-State Circuits, vol. 26, issue 5, pp. 763-767, May 1991. Published, 05/1991.
    http://dx.doi.org/10.1109/4.78246
  • O. A. Olukotun, T. N. Mudge, R. B. Brown, “Implementing a Cache for a High-Performance GaAs Microprocessor,” The 18th Annual International Symposium on Computer Architecture (ISCA), Com-puter Architecture News, May 27-30, 1991, vol. 19, no. 3, pp. 138-147. Published, 05/1991.
    http://dx.doi.org/10.1109/ISCA.1991.1021607
  • C. Kim, D. Kang, R. B. Brown, K. D. Wise, “A High Resolution Current Stimulating Probe for Use in Neural Prostheses,” Proceedings of the First Great Lakes Symposium on VLSI, Kalamazoo, MI, March 1-2, 1991, pp. 202-206. Published, 03/1991.
    http://dx.doi.org/10.1109/GLSV.1991.143966
  • H. D. Goldberg, G. S. Cha*, R. B. Brown, “A Quantitative Adhesion Test for Thin Polymer Films on Silicon Substrates,” Journal of Applied Polymer Science, vol. 43, pp. 1287-1292, Jan. 1991. Published, 01/1991.
  • T. N. Mudge, R. B. Brown, W. P. Birmingham, J. A. Dykstra, A. I. Kayssi, R. J. Lomax, O. A. Oluko-tun, K. A. Sakallah, R. Milano, “The Design of a Micro-Supercomputer,” IEEE Computer Magazine, vol. 24, issue 1, pp. 56-64, Jan. 1991. Other, 01/1991.
    http://dx.doi.org/10.1109/2.67194
  • T. N. Mudge, R. B. Brown, W. P. Birmingham, J. A. Dykstra, A. I. Kayssi, R. J. Lomax, O. A. Oluko-tun, K. A. Sakallah, “The Design of a GaAs Micro-Supercomputer,” Proceedings of the Hawaii International Conference on System Sciences, Jan. 8-11, 1991, vol. 1, pp. 421-432. Published, 01/1991.
    http://dx.doi.org/10.1109/HICSS.1991.183912
  • M. Upton, T. Hoy, T. Huff, R. Brown, R. Oettel, M. Rossman, “Module Generation for a GaAs Micro-processor,” Technical Digest of the Third Physical Design Workshop, Laurel Highlands, PA, May 20- 22, 1991, pp. 88-94. Published, 1991.
  • Koucheng Wu, Richard B. Brown, “High-Temperature Design Rules,” Proceedings of the First International High Temperature Electronics Conference, Albuquerque, NM, June 16-20, 1991, pp. 267-272. Published, 1991.
  • A. I. Kayssi, K. A. Sakallah, R. B. Brown, R. J. Lomax, T. N. Mudge, T. R. Huff, “Impact of MCM‘s on System Performance,” Proceedings of the 1991 Multichip Module Workshop, Santa Cruz, CA, March 28-29, 1991, pp. 58-65. Published, 1991.
  • M. E. Meyerhoff, G. S. Cha*, S. C. Ma, H. D. Goldberg, R. B. Brown, A. R. Midgley, H. C. Cantor, “New Polymeric Membrane Materials for Fabricating Potentiometric Ion- and Bio- Selective Sensors,” Polymeric Material Science and Engineering Proceedings, American Chemical Society, Atlanta, GA, April, 1991, vol. 64, pp. 292-293. Published, 1991.
  • Richard B. Brown, “The Silicon Compiler as a Tool for Teaching Microelectronic System Design,” Technical Digest of the Third Physical Design Workshop, Laurel Highlands, PA, May 20-22, 1991, pp. 64-75. Published, 1991.
  • Richard B. Brown, Ronald J. Lomax, Gordon Carichner, “A Microprocessor Design Project in an Introductory VLSI Course,” Proceedings of the 1991 Microelectronic System Education Conference, Santa Clara, CA, July 22-25, 1991, pp. 195-205. Published, 1991.
  • M. E. Poplawski, H. C. Cantor, A. R. Midgley, R. B. Brown, “Microfabricated Amperometric Biosen-sors,” Proceedings of the 6th International Conference on Solid-State Sensors and Actuators (Transducers ‘91), San Francisco, CA, June 24-28, 1991, pp. S9-S12. Published, 1991.
  • H. D. Goldberg, G. S. Cha*, R. B. Brown, “Ion-Selective Sensors Incorporating Strongly Adhesive Polymeric Membranes,” Proceedings of 1990 North American Workshop on Solid- State Sensors and Actuators, June 4-7, 1990, pp. 169-172. Published, 06/1990.
    http://dx.doi.org/10.1109/SOLSEN.1990.109846
  • Richard B. Brown, Muh-Ling Ger, Tri Nguyen, “Characterization of Molybdenum Thin Films for Micromechanical Structures,” Proceedings of the IEEE Micro Electro Mechanical Systems Workshop, Napa Valley, CA, Feb. 1990, pp. 77-81. Published, 02/1990.
    http://dx.doi.org/10.1109/MEMSYS.1990.110253
  • Geun Sig Cha, Richard B. Brown, “Polyimide-Matrix Chemical-Selective Membranes,” Sensors and Actuators, vol. B1, pp. 281-285, Jan. 1990. Published, 01/1990.
  • Richard B. Brown, “An Advanced VLSI Course Using Silicon Compilation,” Proceedings of the 1990 Microelectronic System Education Conference, San Jose, CA, July 29-Aug. 1, 1990, pp. 177-187. Published, 1990.
  • Richard B. Brown, “The Redesign of an Undergraduate Curriculum to Incorporate Computer- Aided Design,” Proceedings of the Eighth Annual Conference on University Programs in Computer Aided Engineering, Design, and Manufacturing (UPCAEDM), Ann Arbor, MI, Aug. 12-15, 1990, pp. 110- 115. Published, 1990.
  • Howard D. Goldberg, Geun Sig Cha*, Robert W. Hower, Richard B. Brown, “Batch Fabrication of Solid-State Ion-Selective Sensors,” Proceedings of the Third International Meeting on Chemical Sensors, Cleveland, OH, Sept. 24-26, 1990, pp. 31-32. Published, 1990.
  • Richard B. Brown, Koucheng Wu, Mario Ghezzo, Dale M. Brown, Evan Downey, Dave Hanchar, “Junction-Isolated CMOS for High-Temperature Microelectronics,” IEEE Transactions on Electron Devices, vol. 36, no. 9, pp. 1854-1856, Sept. 1989. Published, 09/1989.
    http://dx.doi.org/10.1109/16.34256
  • Jeff Dykstra, Richard B. Brown, “A Comparison of Gold and Superconductors Used as Air- Bridge and Microstrip Interconnects for High-Speed VLSI,” IEEE Journal of Solid-State Circuits, vol. 24, issue 3, pp. 842-844, June 1989. Published, 06/1989.
    http://dx.doi.org/10.1109/4.32049
  • Geun Sig Cha*, Richard B. Brown, “Polyimide-Matrix Chemical-Selective Membranes,” 5th Interna-tional Conference on Solid-State Sensors and Actuators (Transducers ‘89 and Eurosensors III), June 1989, pp. 51-52. Published, 1989.
  • R. B. Brown, K. Wu, M. Ghezzo, D. M. Brown, “A CMOS Process for High Temperature Sensors and Circuits,” Proceedings of the 1988 North American Workshop on Solid-State Sensors and Actuators, June 5-9, 1988, pp. 117-118. Published, 06/1988.
    http://dx.doi.org/10.1109/SOLSEN.1988.26453
  • R. B. Brown, F. L. Terry, K. Wu, “High Temperature Microelectronics - Expanding the Applications for Smart Sensors,” invited paper, Technical Digest of the International Electron Devices Meeting, Dec. 6-9, 1987, pp. 274-277. Published, 12/1987.
    http://dx.doi.org/10.1109/IEDM.1987.191408
  • R. B. Brown, R. J. Huber, D. Petelenz, J. Janata, “An Integrated Multiple-Sensor Chemical Trans-ducer,” Proceedings of the International Conference on Solid-State Sensors and Actuators (Trans-ducers ‘85), Philadelphia, PA, June 1985, pp. 125-127. Published, 1985.